• Title/Summary/Keyword: Direct Interconnection

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Fabrication and Characterization of the Transmitter and Receiver Modules for Free Space Optical Interconnection (자유공간 광연결을 위한 송수신 모듈의 제작및 성능 분석)

  • 김대근;김성준
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.12
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    • pp.16-22
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    • 1994
  • In this paper, transmitter and receiver modules for free space optical interconnection are implemented and characterized. In the transmitter module, bias circuitry which inject current into the direct modulated laser diode is fabricated and in the receiver module, p-i-n diode is integrated with an MMIC amplifying stage. Laser diode has a direct-modulated bandwidth of 2 GHz at 1.4 Ith bias while p-i-n diode and amplifying stage has a bandwidth of 1.3 GHz and 1.5 GHz, repectively. Optical interconnection has a bandwidth of 1.3 GHz and linearly transmit modulated voltage signal up to 1.5 Vp-p. Measured loss of optical interconnection is 5dB which is composed of optoelectronic conversion loss of 15 dB, electrical impedance mismatch loss of 6.7 dB in transmitter module and gain of 18 dB in receiver module. Seperation between transmitter and receiver can be extended up to 50 cm by using a lens.

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A Study on Delay Time and Capacitance Calculation for Interconnection Line in Multi-Dielectric Layer (다층 유전체에서의 Interconnection Line에 대한 커패시턴스와 지연시간 계산 방법에 관한 연구)

  • 김한구;곽계달
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.9
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    • pp.46-55
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    • 1992
  • This paper propose how to calculate the capacitance for VLSI interconnection lines in multi-dielectric layer. The proposed method is a expansive form of 3-dimensional direct intergral method developed in single-dielectric layer. We took into consideration the effect of multi-dielectric layer by using additional boundary condition instead of modified Green's function. It is used the potential equations in line surface and the electric field equations in dielectric interface as the boundary condition. RC delay time for interconnection line of multi-dielectric layer is obtained from the calculated capacitance value. At this time, we are used Al and WSiS12T as interconnection materials.

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Major Issues in Internet Interconnection and Policy Directions in Korea (인터넷망 상호접속의 국내 주요이슈 도출과 이슈별 개선방안)

  • Jung, Choong Young;Byun, Jae Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.19 no.1
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    • pp.1-12
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    • 2015
  • This paper discusses current internet interconnection issues according to radical changes of internet traffic pattern. In this context, the recovery of network investment cost for network provider becomes hot issue. For recovery issues of investment cost, there are many disputes among stake holders. Therefore, it is necessary to investigate this issues in the context of internet interconnection. Also, it is important to develop the current regulation about internet interconnection under traffic changing environments. This paper selects four issues to deal with and analyzes the present situations and problems about these issues, and provides alternatives for internet interconnection corresponding to these four issues.

Direct Measurement of the VLSI Interconnection Line Capacitances Using a Grounded Shield Plate (접지된 Shield Plate를 이용한 집적회로의 배선용량 측정)

  • 강래구;전성오;신윤승
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.3
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    • pp.302-307
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    • 1988
  • A noble interconnection line capacitance measurement method to be able to remove the measurement errors from the probe pad to substrate stray capacitance has been proposed and verified. The measurement errors in the capacitance measurement, which usually be involved from the probe pad to substrate stray capacitance, can easily be removed by isolating the metal probe pad from the substrate with a grounded shield plate between the probe pad the substrate. The measurement results by using this improved capacitance measurement method were compared with the calculations by two-dimensional computer simulations.

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Electromigration Characteristics in PSG/SiO$_2$ Passivated Al-l%Si Thin Film Interconnections

  • Kim, Jin-Young
    • Journal of Korean Vacuum Science & Technology
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    • v.7 no.2
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    • pp.39-44
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    • 2003
  • Recent ULSI and multilevel structure trends in microelectronic devices minimize the line width down to a quarter micron and below, which results in the high current densities in thin film interconnections. Under high current densities, an EM(electromigration) induced failure becomes one of the critical problems in a microelectronic device. This study is to improve thin film interconnection materials by investigating the EM characteristics in PSG(phosphosilicate glass)/SiO$_2$ passivated Al-l%Si thin film interconnections. Straight line patterns, wide and narrow link type patterns, and meander type patterns, etc. were fabricated by a standard photholithography process. The main results are as follows. The current crowding effects result in the decrease of the lifetime in thin film interconnections. The electric field effects accelerate the decrease of lifetime in the double-layered thin film interconnections. The lifetime of interconnections also depends upon the current conditions of P.D.C.(pulsed direct current) frequencies applied at the same duty factor.

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Design of Learning Management System Interconnection Model (학습관리시스템(LMS) 상호 연동 모형의 설계)

  • Nam, Yun-seong;Choi, Hyung Jin;Hyun, eun-mi;Seo, Hyun-suk
    • Proceedings of the Korea Contents Association Conference
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    • 2009.05a
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    • pp.45-50
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    • 2009
  • The educational exchange through e-learning is working very well in such case as develop e-learning, development of various learning tools, cooperative practical use of e-learning contents, etc. However because there were no considerations of LMS(Learning Management System) interconnection when each systems were developed, the exchange through e-learning is starting to raise a problem. Especially the exchange through e-learning between university produced problem for a variety of reasons by absence of direct exchange in every case such as communication of students information, communication of lecture information, etc. Hence in this thesis, I will present designed model about efficient LMS interconnection through analysis case of exchange through e-learning and deduce problem. In the first place I define essential part for study such as lecture establishment data, lecture data, user data, class data, student learning tracking to interconnection data, then constituted data interconnection table used view by data interconnection prcess. By experiment result, the accessibility between students and professors was more convenience, and decreased work process by less data exchange. Henceforth there are researches in development of various essential parts for study, considered security of LMS interconnection.

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Interconnection Processes Using Cu Vias for MEMS Sensor Packages (Cu 비아를 이용한 MEMS 센서의 스택 패키지용 Interconnection 공정)

  • Park, S.H.;Oh, T.S.;Eum, Y.S.;Moon, J.T.
    • Journal of the Microelectronics and Packaging Society
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    • v.14 no.4
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    • pp.63-69
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    • 2007
  • We investigated interconnection processes using Cu vias for MEMS sensor packages. Ag paste layer was formed on a glass substrate and used as a seed layer for electrodeposition of Cu vias after bonding a Si substrate with through-via holes. With applying electrodeposition current densities of $20mA/cm^2\;and\;30mA/cm^2$ at direct current mode to the Ag paste seed-layer, Cu vias of $200{\mu}m$ diameter and $350{\mu}m$ depth were formed successfully without electrodeposition defects. Interconnection processes for MEMS sensor packages could be accomplished with Ti/Cu/Ti line formation, Au pad electrodeposition, Sn solder electrodeposition and reflow process on the Si substrate where Cu vias were formed by Cu electrodeposition into through-via holes.

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Low-Loss Multimode Waveguides Using Organic-Inorganic Hybrid Materials

  • Yoon, Keun-Byoung
    • Macromolecular Research
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    • v.12 no.3
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    • pp.290-292
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    • 2004
  • Multimode channel waveguides were fabricated using a direct UV patterning technology from thick films deposited by the one-step dip-coating of an organic/inorganic hybrid material (ORMOCER(equation omitted). The core size of the covered ridge waveguide was 43${\times}$51 $\mu\textrm{m}$$^2$; the waveguides can be readily prepared for multimode applications by direct UV patterning. The waveguides exhibited smooth surface profiles and a low optical loss of 0.07 ㏈/cm at the most important wavelength (850nm) used for optical interconnects.

A Study on Efficient Fault-Diagnosis for Multistage Interconnection Networks (다단 상호 연결 네트워크를 위한 효율적인 고장 진단에 관한 연구)

  • Bae, Sung-Hwan;Kim, Dae-Ik;Lee, Sang-Tae;Chon, Byoung-SIl
    • The Journal of the Acoustical Society of Korea
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    • v.15 no.5
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    • pp.73-81
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    • 1996
  • In multiprocessor systems with multiple processors and memories, efficient communication between processors and memories is critical for high performance. Various types of multistage networks have been proposed. The economic feasibility and the improvements in both computing throughput and fault tolerance/diagnosis have been some of the most important factors in the development of these computer systems. In this paper, we present an efficient algorithm for the diagnosis of generalized cube interconnection networks with a fan-in/fan-out of 2. Also, using the assumed fault model present total fault diagnosis by generating suitable fault-detection and fault-location test sets for link stuck fault, switching element fault in direct/cross states, including broadcast diagnosis methods based on some basic properties or generalized cube interconnection networks. Finally, we illustrate some example.

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A Switch Wrapper Design for an AMBA AXI On-Chip-Network (AMBA AHB와 AXI간 연동을 위한 Switch Wrapper의 설계)

  • Yi, Jong-Su;Chang, Ji-Ho;Lee, Ho-Young;Kim, Jun-Seong
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.869-872
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    • 2005
  • In this paper we present a switch wrapper for an AMBA AXI, which is an efficient on-chip-network interface compared to bus-based interfaces in a multiprocessor SoC. The AXI uses an idea of NoC to provide the increasing demands on communication bandwidth within a single chip. A switch wrapper for AXI is located between a interconnection network and two IPs connecting them together. It carries out a mode of routing to interconnection network and executes protocol conversions to provide compatibility in IP reuse. A switch wrapper consists of a direct router, AHB-AXI converters, interface modules and a controller modules. We propose the design of a all-in-one type switch wrapper.

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