• 천문학회보
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• 제36권2호
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• pp.51.2-51.2
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• 2011

We have studied the topology of volume-limited galaxy sample selected from the very luminous red galaxies (LRGs) in the completed Sloan Digital Sky Survey. LRGs are predominantly massive elliptical galaxies and tend to reside in massive dark matter halos. We compared the observed genus statistics with predictions from perturbation theory and mock LRG surveys constructed from dark matter halos in a Lambda CDM model. To compare with the observational data, we made 129 mock surveys in the past light cone space by using three different size CDM simulations: 41203 particle 6592 Mpc/h, 60003 particle 7200 Mpc/h, and $7210^3$ particle 10815 Mpc/h.

• Journal of Power Electronics
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• 제19권1호
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• pp.134-145
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• 2019

A single-phase step-up five-level inverter topology with a new phase-shifted pulse width modulation (PS-PWM) strategy is proposed in this paper. When compared with conventional single-phase five-level inverter topologies, the proposed topology can realize multilevel inversion with a double step-up ratio, a reduced number of switching devices and self-balanced capacitor voltages. When compared with the conventional PS-PWM strategy, the new PS-PWM strategy can be implemented with one carrier reduced, which makes it much easier to implement in a digital signal processor (DSP) system. Experimental results have been presented to verify the effectiveness of the proposed inverter and the PS-PWM strategy.

• Spatial Information Research
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• 제8권1호
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• pp.31-50
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• 2000

국가 GIS 구축사업의 일환으로 지형도를 비롯한 여러 가지 주제들이 수치지도로 구축되어왔다. 이렇게 구축된 수치지도는 사용하고자 하는 목적에 맞게 올바르게 구축되어 그 정확도를 신뢰할 수 있을 경우에만 효율적으로 사용될 수 있다. 본 연구의 목적은 양질의 수치지도를 구축하는데 필요한 합리적인 검수방안을 제시하는데 있다. 이를 위해 국내·외에서 요구되는 수치지도의 품질요소와 검수현황을 살펴보았고, 수치지도에서 발생하는 오류유형을 분석했다. 이러한 오류유형을 바탕으로 데이터생성연혁, 데이트포맷, 위치정확성, 속성정확성, 기하구조의 적합성, 논리적 일관성, 경계인접, 완전성, 도곽선 범위의 9가지 기존을 마련한 뒤 작업계획, 오류유형 정의, 납품내역검수, 육안중첩검수, 현지조사검수, 전산정밀검수, 자동검수, 검수결과판정, 검수결과해석으로 이어지는 9단계의 체계적인 다단계 검수절차를 제안하였다.

• 한국측량학회:학술대회논문집
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• 한국측량학회 2004년도 춘계학술발표회논문집
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• pp.383-388
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• 2004

The fusion of a different kind sensor is fusion of the obtained data by the respective independent technology. This is a important technology for the construction of 3D spatial information. particularly, information is variously realized by the fusion of LiDAR and mobile scanning system and digital map, fusion of LiDAR data and high resolution, LiDAR etc. This study is to generate union DEM and digital ortho image by the fusion of LiDAR data and high resolution image and monitor precisely topology, building, trees etc in urban areas using the union DEM and digital ortho image. using only the LiDAR data has some problems because it needs manual linearization and subjective reconstruction.

• Journal of Power Electronics
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• 제15권3호
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• pp.644-651
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• 2015

This paper introduces a novel digital one cycle control (DOCC) boost power factor correction (PFC) converter. The proposed PFC converter realizes the FPGA-based DOCC control approach for single-phase PFC rectifiers without input voltage sensing or a complicated two-loop compensation design. It can also achieve a high power factor and the operation of low harmonic input current ingredients over universal loads in continuous conduction mode. The trailing triangle modulation adopted in this approach makes the acquisition of the average input current an easy process. The controller implementation is based on a boost topology power circuit with low speed, low-resolution A/D converters, and economical FPGA development board. Experimental results demonstrate that the proposed PFC rectifier can obtain a PF value of up to 0.999 and a minimum THD of at least 1.9% using a 120W prototype.

• Journal of Electrical Engineering and Technology
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• 제12권4호
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• pp.1529-1536
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• 2017

A digital dual-channel interleaved phase-shift full-bridge converter is investigated in this paper, and its topology and principle are analyzed. To realize current sharing and stabilize the output voltage, a controller with current sharing loop and closed voltage loop is employed. In addition, current sharing will increase the output current fluctuation and a new digital interleaved driving technology is proposed to reduce the output current ripple. To verify the analysis, simulation and experiments are carried out, which shows the effectiveness of the proposed control strategies.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2004년도 전력전자학술대회 논문집(2)
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• pp.807-810
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• 2004

This is a experimental result which is reported with using 16-Bit microprocessor H8 series of Renesas company, organizing digital control which is practicable PWM embodiment, and applying switched-mode power supply. The basic topology consists of the active clamp forward DC-DC converter which is widely used for the highly efficient power supply these days. In an experiment, it incites the result to lay emphasis on the highly efficient operation of converter, and performance of digital control which is practicable PWM embodiment. And it is debated on performance of processor and condition for improving performance of part.

• 호남수학학술지
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• 제35권4호
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• pp.707-716
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• 2013

The present paper consists of two parts. Since the recent paper [4] proved that an Alexandroff $T_0$-space is a semi-$T_{\frac{1}{2}}$-space, the first part studies semi-open and semi-closed structures of the Khalimsky nD space. The second one focuses on the study of a relation between the LS-property of ($SC^{n_1,l_1}_{k_1}{\times}SC^{n_2,l_2}_{k_2}$, k) relative to the simple closed $k_i$-curves $SC^{n_i,l_i}_{k_i}$, $i{\in}\{1,2\}$ and its normal k-adjacency. In addition, the present paper points out that the main theorems of Boxer and Karaca's paper [3] such as Theorems 4.4 and 4.7 of [3] cannot be new assertions. Indeed, instead they should be attributed to Theorems 4.3 and 4.5, and Example 4.6 of [10].

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 D
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• pp.2755-2757
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• 2002

In this paper, we propose a now architecture for hardware implementation of digital neural network. By adopting flexible ladder-style bus and internal connection network into traditional SIMD-type digital neural network architecture, the proposed architecture enables fast processing that is based on parallelism, while does not abandon the flexibility and extensibility of the traditional approach. In the proposed architecture, users can change the network topology by setting configuration registers. Such reconfigurability on hardware allows enough usability like software simulation. We implement the proposed design on real FPGA, and configure the chip to multi-layer perceptron with back propagation for alphabet recognition problem. Performance comparison with its software counterpart shows its value in the aspect of performance and flexibility.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 B
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• pp.1269-1271
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• 2004

This is a thesis experiment result which is reported with using 16-Bit microprocessor H8 series of Renesas company, organizing digital control which is practicable PWM embodiment, and applying switched-mode power supply. The basic topology consists of the active clamp forward DC-DC converter which is widely used for the highly efficient power supply these days. In an experiment, it incites the result to lay emphasis on the highly efficient operation of converter, and performance of digital control which is practicable PWM embodiment. And it is debated on performance of processor and condition for improving performance of part.