• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.1
• /
• pp.959-962
• /
• 2005

Servomotors are used as key components of automated system by performing accurate positioning, accurate speed regulation, and precise motion control in response to commands from computers and sensors. Especially linear brushless servomotors have numerous advantages over ball screws, timing belts, rack/pinion drives and friction drives compared with rotary servomotors. This paper proposes the estimation of unknown parameters from the linear brushless DC motor which is operated by sinusoidal commutation. The estimated parameters are used to tune the controller gain and disturbance observer. In order to agree with this purpose, Digital Signal Processor(TMS320F240), developed for implementation of a speed Field Oriented Control(FOC), adopted in this study. The processor playing an important role in controller has A/D converters, PWM generators, riched I/O port internally.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.9 no.8
• /
• pp.1805-1811
• /
• 2005

We analyzed of the receiver which received OOK and the FSK transmission signal that were a general digital transmission technique in a WDM system. We expressed various error probability with the m which was bandwidth and a bit numerical function and carried out performance evaluation of a receiver in a performance evaluation way. When error probability was $10^{-4}$ which is m=10, as for the receive sensitivity of OOK, the $1.7{\times}10^2$, FSK got $2.2{\times}10^2$ through simulation. And the receive sensitivity of OOK and FSK was able to get each $2.15{\times}10^2$ and $3.07{\times}10^2$ when it was error probability of $10^{-9}$ which is m = 25. Transmission of 23Gb/S showed that it was possible when we does the $10^{-9}$ that was basis error probability of a light communication system with a basis through this, and a coding profit was with for and transmission capacity of 75Gb/s confirmed that it was possible if a code rate was with 0.8.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.2
• /
• pp.895-898
• /
• 2005

This paper describes a design of LNS-based divider and square-root circuits which are key arithmetic units in graphic processor and digital signal processor. To achive area-efficient and low-power that is an essential consideration for mobile environment, a fixed-point format of 16.16 is adopted instead of conventional floating-point format. The designed divider and square-root units consist of binary-to-logarithm converter, subtractor, logarithm-to-binary converter. The binary to logarithm converter is designed using combinational logic based on six regions approximation method. As a result, gate count reduction is obtained when compared with conventional lookup approack. The designed units is 3,130 gate count and 1,280 gate count. To minimize average percent error 3.8% and 4.2%. error compensation method is employed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• v.9 no.1
• /
• pp.951-954
• /
• 2005

This paper presents a study on the accuracy position Controller design for the Composite Smoke Bomb Rotational driving system using a BLDC servo motor. Function of Smoke Bomb is blind in the enermy's sight so that need to high response. The BLDC servo motor controller was designed with DSP(TMS320VC33), IGBT(Insulated Gate Bipolar. Transistor), IGBT gate driver and CPLD(EPM7128). This paper implements those control with vector control and MIN-MAX PWM. Vector control requires information about rotor positions, a resolver should be used to achieve that. The main controller is implemented with a TMS320VC33 high performance floating-point DSP(Digital Signal Process) and PWM Generator is embodied using EPM7128.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.19 no.4
• /
• pp.712-720
• /
• 1994

In digital mobile communication systems, the convolutional coding is considered as the optimum error correcting scheme. Recently, the Viterbi algorithm is widely used for the decoding of convolutional code. Most Viterbi decoder has been proposed in conde rate R=1/2 or 2/3 with memory components (m) less than 3. which degrades the error correcting capability because of small code constraints (K). We consider the design method for typical code rate R=1/2, K=7(171,133) convolutional code with memory components, m=6. In this paper, a novel construction method is presented which combines maximum likelihood decoding with a state transition double detection and comparison method. And the designed circuit has the error-correcting capability of random 2 bit error. As the results of logic simulation, it is shown that the proposed Viterbi decoder exactly corrects 1 bit and 2 bit error signal.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.32 no.2C
• /
• pp.113-123
• /
• 2007

In Ubiquitous communication environment, various conversions of images are essential, and most digital images are compressed by standard methods such as the Joint Photographic Expert Group (JPEG) and Motion Picture Expert Group (MPEG) which are based on the discrete cosine transform (DCT). In this paper, various image resizing algorithms in the DCT domain are analyzed, and a new image resizing algorithm, which shows superior performance compared with the conventional methods, is proposed. For arbitrary-ratio image resizing in the DCT domain, several blocks of $8{\times}8$ DCT coefficients are converted into one block using the conversion formula in the proposed algorithm, and the size of the inverse discrete cosine transform (IDCT) is decided optimally. The performance is analyzed by comparing the peak signal to noise ratio (PSNR) between original images and converted images. The performance of the proposed algorithm is better than that of the conventional algorithm, since the correlation of pixels in images is utilized more efficiently.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.33 no.8A
• /
• pp.846-851
• /
• 2008

With rapid development of communication industry, the kinds of communication service vary. According to the increasing use of radio waves, the intelligent and effective radio monitoring system needs to be developed, which is replaced for previous radio monitoring system. Next-generation intelligent radio monitoring system based on ITU-R, Rule of wireless facilities, and Radio Waves Act is used, and which can accurately and effectively function as effective radio monitoring system through spectrum analysis of channel power, frequency deviation, offset, and an occupied frequency bandwidth(99% or x-dB), about the analog and digital signal in On-Air of V/UHF bandwidth. Main function of the system has an radio quality measurement, unwanted electromagnetic signals (spurious, harmonic) measurement, high-speed spectrum measurement, frequency usage efficiency investigation, illegal radio exploration, working monitoring, In this paper, we proposes radio quality measurement, high-speed spectrum measurement of next-generation intelligent radio monitoring system.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.38B no.9
• /
• pp.765-774
• /
• 2013

In this paper, we present a cooperative compressed spectrum sensing scheme for correlated signals in decentralized wideband cognitive radio networks. Compressed sensing is a signal processing technique that can recover signals which are sampled below the Nyquist rate with high probability, and can solve the necessity of high-speed analog-to-digital converter problem for wideband spectrum sensing. In compressed sensing, one of the main issues is to design recovery algorithms which accurately recover original signals from compressed signals. In this paper, in order to achieve high recovery performance, we consider the multiple measurement vector model which has a sequence of compressed signals, and propose a cooperative sparse Bayesian recovery algorithm which models the temporal correlation of the input signals.

• Journal of Power Electronics
• /
• v.15 no.1
• /
• pp.190-201
• /
• 2015

This paper uses the switching function approach to present a simple state model of the Vienna-type rectifier. The approach introduces the relationship between the DC-link neutral point voltage and the AC side phase currents. A novel direct power control (DPC) strategy, which is based on the sliding mode control (SMC) for Vienna I rectifiers, is developed using the proposed power model in the stationary ${\alpha}-{\beta}$ reference frames. The SMC-based DPC methodology directly regulates instantaneous active and reactive powers without transforming to a synchronous rotating coordinate reference frame or a tracking phase angle of grid voltage. Moreover, the required rectifier control voltages are directly calculated by utilizing the non-linear SMC scheme. Theoretically, active and reactive power flows are controlled without ripple or cross coupling. Furthermore, the fixed-switching frequency is obtained by employing the simplified space vector modulation (SVM). SVM solves the complicated designing problem of the AC harmonic filter. The simplified SVM is based on the simplification of the space vector diagram of a three-level converter into that of a two-level converter. The dwelling time calculation and switching sequence selection are easily implemented like those in the conventional two-level rectifier. Replacing the current control loops with power control loops simplifies the system design and enhances the transient performance. The simulation models in MATLAB/Simulink and the digital signal processor-controlled 1.5 kW Vienna-type rectifier are used to verify the fast responses and robustness of the proposed control scheme.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.14 no.1
• /
• pp.72-81
• /
• 2009

This paper presents quasi-resonant type high power factor ac power supply for atmospheric pressure plasma cleaning system adopting three phase PFC boost converter and it's control method. The presented ac power supply consists of single phase H-bridge inverter, step-up transformer for generating high voltage and three phase PFC boost converter for high power factor on source utility. Unlikely to the traditional LC resonant converter, the propose one has an inductor inside only. A single resonant takes place through the inside inductor and the capacitor from the plasma load modeled into two series capacitor and one resistance. The quasi-resonant can be achieved by cutting the switching signal when the load current decrease to zero. To obtain power control ability, the propose converter controlled by two control schemes. One is the changing output pulse period scheme in the manner of PFM(Pulse Frequency Modulation) control. On the other, to provide more higher power to load, the DC rail voltage is directly controlled by the 3-phase PFC boost converter. The significant merits of the proposed converter are the uniform power providing capability for high quality plasma generation and low reactive power in AC and DC side. The proposed work is verified through digital simulation and experimental implementation.