• International Journal of Fuzzy Logic and Intelligent Systems
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• 제16권1호
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• pp.21-26
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• 2016

Canine cataract is developed with aging and can cause the blindness or surgical treatment if not treated timely. The first observation must be made by pet owners but they do not have proper equipment and knowledge to see the abnormalities. In this paper, we propose an intelligent image processing method to extract canine cataract suspicious object from non-professional equipment such as ordinary digital camera and cellular phone photographs so that even casual owners of pet dog can make a pre-diagnosis of such a surgery-needed disease as soon as possible. The experiment shows that the proposed method is successful in most cases except the dog has similar colored hair to the color of cataract.

• International Journal of Aeronautical and Space Sciences
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• 제5권2호
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• pp.28-34
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• 2004

One of the major problem encountered in nuclear plants and satellites design isEMI (Electro-Magnetic Interference) and EMC (Electro-Magnetic Compatibility).Here, our focus is to implement the test board for checking SEU (Single EventUpsets); the effects of protons on the electronic system. The SEU results from thelevel change of stored information due to photon radiation and temperature in thespace environment. The impact of SEU on PLD (Programmable Logic Devices)technology is most apparent in ROM/SRAM/DRAM devices wherein the state ofstorage cell can be upset. In this paper, a simple and powerful test techniques issuggested, and the results are presented for the analysis and future reference. In ourexperiment, the proton radiation facilitv (having the energy of 50 MeV with a beamcurrent of 60 uA of cyclotron) available at KIRAMS (Korea Institute of RadiologicalMedical Sciences) has been applied on a commercially available SRAM manufacturedby Hynix Semiconductor Company.

• 센서학회지
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• 제23권2호
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• pp.73-81
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• 2014

Silicon PIN diode radiation sensors and CMOS readout circuits were designed and fabricated in this study. The PIN diodes were fabricated using a 380-${\mu}m$-thick 4-inch n+ Si (111) wafer containing a $2-k{\Omega}{\cdot}cm$ n- thin epitaxial layer. CMOS readout circuits employed the driving and signal processes in a radiation sensor were mixed with digital logic and analog input circuits. The primary functions of readout circuits are amplification of sensor signals and the generation of the alarm signals when radiation events occur. The radiation sensors and CMOS readout circuits were fabricated in the Institute of Semiconductor Fusion Technology (ISFT) semiconductor fabrication facilities located in Kyungpook National University. The performance of the readout circuit combined with the Si PIN diode sensor was demonstrated.

• 한국감성과학회:학술대회논문집
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• 한국감성과학회 2002년도 추계학술대회 논문집
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• pp.157-159
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• 2002

패션트렌드와 소비자감성에 적합한 패션소재를 기획, 선정하는데 도움을 주는 컴퓨터 기반의 의사 결정시스템이 개발되었다. 패션소재로서의 유용성을 결정하는 속성을 두께, 무게, 밀도, 광택, 색상등으로 한정한 후 다속성 모델을 구축하였다. 각 속성들의 가중치는 의류 매장의 방문객 대상의 설문 조사에 의해 결정되었으며, 한 소재의 최조 가치는 퍼지 추론 시스템에 의해 계산되었다. 구축된 “퍼지-다속성” 모델을 이용하여 패션소재의 총 가치를 i) 품질로부터의 가치, ii) 품질을 기반으로 부가되는 가치, iii) 품질과는 무관하게 형성되는 브랜드 가치의 세가지 요소롤 분해하였다. 시중의 유명 스포츠 의류 브랜드 2종을 선정하여 위의 모델을 적용하였다. 위의 모델은 컴퓨터 시스템으로 개발되어, 특정 소재의 기본정보가 입력이 되면 그에 해당하는 감성정보로 변환되는 소재 평가 시스템과 역으로 원하는 감성 어휘를 입력하면 그에 해당하는 소재를 제안하는 소재 기획 시스템의 독립적인 두 요소로 구성된다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1996년도 추계학술대회 논문집
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• pp.113-116
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• 1996

The drain current of the MOSFET in the off state(i.e., Id when Vgs=0V) is undesired but nevertheless important leakage current device parameter in many digital CMOS IC applications (including DRAMs, SRAMs, dynamic logic circuits, and portable systems). The standby power consumed by devices in the off state have added to the total power consumed by the IC, increasing heat dissipation problems in the chip. In this paper, hot-carrier-induced degra- dation and gate-induced-drain-leakage curr- ent under worse case in P-MOSFET\`s have been studied. First of all, the degradation of gate-induced- drain-leakage current due to electron/hole trapping and surface electric field in off state MOSFET\`s which has appeared as an additional constraint in scaling down p-MOSFET\`s. The GIDL current in p-MOSFET\`s was decreased by hot-electron stressing, because the trapped charge were decreased surface-electric-field. But the GIDL current in n-MOS77T\`s under worse case was increased.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.983-984
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• 2006

Multi-band VCO with fast response adaptive frequency calibration (AFC) technique is designed in 1.8V $0.18{\mu}m$ CMOS process. The possible operation is verified for 5.8GHz band, 5.2GHz band, and 2.4GHz band using the switchable L-C resonators for 802.11a/b/g WLAN applications. To linearize its frequency-voltage gain, optimized multiple MOS varactor biasing technique is used. In order to operate in each band frequency range with reduced VCO gain, 4-bit digitally controlled switched-capacitor bank is used and a wide-range digital logic quadricorrelator is implemented for fast frequency detector.

• 대한전자공학회논문지SD
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• 제45권1호
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• pp.20-27
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• 2008

본 논문에서는 비선형 패턴 분류를 위해 FPGA 칩에 신경회로망을 구현하였다. 병렬처리 연산을 위해 순방향 신경회로망이 구현 되었다. 신경망의 학습을 off-line으로 한 다음에 가중치 값들을 저장하여 사용한다. 예로서, AND와 XOR 논리의 패턴 구분이 수행된다. 실험결과를 통해 FPGA에 구현된 신경회로망이 잘 작동하는 것을 검증하였다.

• International Journal of Fuzzy Logic and Intelligent Systems
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• 제13권4호
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• pp.277-283
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• 2013

In this study, we propose a novel method for modeling dynamic hysteresis. Hysteresis is a widespread phenomenon that is observed in many physical systems. Many different models have been developed for representing a hysteretic system. Among them, the Duhem model is a classical nonlinear dynamic hysteresis model satisfying the properties of hysteresis. The purpose of this work is to develop a novel method that expresses the local dynamics of the Duhem model by a linear system model. Our approach utilizes a certain type of fuzzy system that is based on Takagi-Sugeno (T-S) fuzzy models. The proposed T-S fuzzy Duhem model is achieved by fuzzy blending of the linear system model. A simulated example applied to shape memory alloy actuators, which have typical hysteretic properties, illustrates the applicability of our proposed scheme.

• 전자공학회논문지A
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• 제30A권11호
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• pp.140-148
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• 1993

High Integration ratio of CMOS circuits incredily increases the test cost during the design and fabrication processes because of the FET fault(Stuck-on faults and Stuck-off faults) which are due to the operational characteristics of CMOS circuits. This paper proposes a test generation algorithm for an arbitrarily large CMOS circuit, which can unify the test steps during the design and fabrication procedure and be applied to both static and dynaic circuits. This algorithm uses the logic equations set for the subroutines resulted from arbitrarily dividing the full circuit hierarchically or horizontally. Also it involves a driving procedure from output stage to input stage, in which to drive a test set corresponding to a subcircuit, only the subcircuits connected to that to be driven are used as the driving resource. With this algorithm the test cost for the large circuit such as VLSI can be reduced very much.

• 조명전기설비학회논문지
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• 제25권11호
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• pp.33-38
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• 2011

In this paper, the effect of pulse current and generated heat on characteristics of the LED is measured and evaluated. For experiments, the LED driving circuit and digital logic which determines period and duty ratio of lighting are designed. At rated current, the temperature and optical characteristics of the LED with change in duty ratio and period are compared, and those of the LED with change in duty ratio and existence of cooling fan are also compared at constant average current. As a result, frequency does not affect device temperature and optical characteristic of the LED but duty ratio does. Also, the cooling fan is less effective on those of the LED at rated current.