• Journal of Digital Contents Society
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• v.18 no.3
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• pp.607-612
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• 2017

The use of RaspberryPi in building an embedded system may be difficult for users in understanding the circuit and the hardware cost. This paper proposes a solution that can test the systems virtually. The solution consists of three elements; (i) editor, (ii) interpreter and (iii) simulator and provides nine full modules and also allows the users to configure/run/test their own circuits like real environment. The task of abstraction for modules through the actual circuit test was carried out on the basis of the data sheet and the specification provided by the manufacturer. If we can improve the level of quality of our solution, it can be useful in terms of cost reduction and easy learning. To achieve this end, the electrical physics engine, the level of interpreter that can be ported to the actual board, and a generalization of the simulation logic are required.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.197-209
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• 2003

A current TV out format is quite different from that of HDTV or PC monitor in encoding techniques. In other words, a conventional analog TV uses interlaced display while HDTV or PC monitor uses Non-interlaced / Progressive-scanned display. In order to encode image signals coming from devices that takes interlaced display format for progressive scanned display, a hardware logic in which scanning and interpolation algorithms are implemented is necessary. The ELA(Edge-Based Line Average) algorithm have been widely used because it provided good characteristics. In this study, the ADI(Adaptive De-interlacing Interpolation) algorithm using to improve the ELA algorithm which shows low quality in vertical edge detections and low efficiency of horizontal edge lines. With the De-interlacing ASIC chip that converts the interlaced Digital YUV to De-interlaced Digital RGB is designed. The VHDL is used for chip design.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.16 no.10
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• pp.914-924
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• 1991

It has been generally used for PLL(Phase Locked Loop) to be synthesized randomly chosen frequency state, but the PLL locking time was inevitable element. A direct digital synthesizer. Which makes output frequency directly in sine wave by a phase accumulating method, could be leiminate the defect, although a phase distortion in frequency spectrum. In order to improve this disadvantage, the phase accumulating method is reconsidered in the side of he output wave formula expression. A new mechanism is proposed, and it is constructed by a most suitable logic elements. The spectrum of synthesized sine waveform is simulated and compared with a measured value, and it’s the coherence frequency hoppong state with the PN(Pseudo Noise) code sequence is confirmed. In this results, the power levels of phase distortion harmonics are decreased to 10~25dB and bandwidths are increased to 420kHz.

• KEPCO Journal on Electric Power and Energy
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• v.6 no.3
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• pp.253-257
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• 2020

The local information processing devices are devices that process information by converting voltage, current, and digital electric signals from legacy-type power facility into IEC 61850 based data. It acquires and processes the operation information of legacy-type power facility, performs control of power facility, and interlock function using internal logic. In particular, the time to convert data to process input and output information for a device is important because a number of protection relay input and output signals are handled by only one device. This paper introduces test methods and cases for measuring IEC 61850 communication function and input/output data conversion time of local information processing device.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.12
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• pp.2633-2640
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• 2009

We design a small-area, low-power, and high-speed EEPROM for touch screen controller IC. As a small-area EEPROM design, a SSTC (side-wall selective transistor) cell is proposed, and high-voltage switching circuits repeated in the EEPROM core circuit are optimized. A digital data-bus sensing amplifier circuit is proposed as a low-power technology. For high speed, the distributed data-bus scheme is applied, and the driving voltage for both the EEPROM cell and the high-voltage switching circuits uses VDDP (=3.3V) which is higher than the logic voltage, VDD (=1.8V), using a dual power supply. The layout size of the designed 128-KBit EEPROMIP is $662.31{\mu}m{\times}1314.89{\mu}m$.

• Journal of KIISE:Software and Applications
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• v.32 no.2
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• pp.108-118
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• 2005

The software of the nuclear power plant digital control system is a safety-critical system where many techniques must be applied to it in order to preserve safety in the whole system. Formal specifications especially allow the system to be clearly and completely specified in the early requirements specification phase, therefore making it a trusted method for increasing safety. In this paper, we discuss a systematic method, which generates PLC-based FBD programs from the requirements specification using NuSCR, a formal requirements specification method. This FBD programs takes an important position in design specification. The proposed method can reduce the possible errors occur in the manual design specification, and the software development cost and time. To investigate the usefulness of our proposed method, we introduce the fixed set-point rising trip example, a trip logic of BP in DPPS RPS, which is presently being developed at KNICS.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.4
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• pp.773-778
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• 2007

In order to resolve problems with the phase error in QPSK demodulator of the digital satellite broadcasting systems, the demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the complexity of implementation is reduced by the reduction into half of the number of the multiplier in Inter structure of the conventional carrier recovery loop, and as the drawback of NCO of the conventional carrier recovery loop wastes a amount of power for the structure of lookup table, We designed the structure of combinational logic without the lookup table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the lookup table is $175{\mu}W$, NCO with the proposed structure is $24.65{\mu}W$. As the result, it is recognized that about one eight of loss power is reduced. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.2
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• pp.347-353
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• 2012

In this paper, authors will develop the quick and precise remote controller of automatic fire detection equipment (P-type one-class receiver) based on information communication technology (IT). The remote controller detects the fire and disaster in the building automatically and quickly and then activates the facilities to extinguish the fire and disaster, monitoring such situation in a real time through wire-wireless communication network. The proposed remote controller is applied a programmable logic device (PLD) micom. of one-chip type which is small size and lightweight and also has highly sensitive-precise reliabilities. The one-chip type PLD micom. analyzes digital signals from sensors, then activates fire extinguishing facilities for alarm and rapid suppression in a case of fire and disaster. The detected data is also transferred to a remote situation room through wire-wireless network of RS232c and bluetooth communication, and then the situation room sends an emergency alarm signal. The automatic fire detection equipment (AFDE) based on IT will minimize the life and wealth loss while prevents fire and disaster.

• 제어로봇시스템학회:학술대회논문집
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• 2004.08a
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• pp.354-357
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• 2004

According to the computerization of railway signaling systems, the interface link between the signaling systems has been replaced by the digital communication channel. At the same time, the importance of the communication link is more pronounced than in the past. In this paper, new network-based protocol for Korean railway signaling has designed between CTC and SCADA system, and the overview of designed protocol is briefly represented. Using the informal method for specifying the communication protocol, a little ambiguity may be contained in the protocol. To clear the ambiguity contained in the designed protocol, we use LTS model to design the protocol for this interface link between CTC and SCADA, the LTS is an intermediate model for encoding the operational behavior of processes. And then, we verify automatically and formally the safety and the liveness properties through the model checking method. Especially, the modal ${\mu}$-calculus, which is a highly expressive method of temporal logic that has been applied to the model checking method. It will be expected to increase the safety, reliability and efficiency of maintenance of the signaling systems by using the designed protocol for railway signaling in Korea.

• Journal of Institute of Control, Robotics and Systems
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• v.22 no.2
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• pp.89-96
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• 2016

This paper describes the design of a force measurement and communication system for the force measuring system in industrial robots. The force measurement and communication system is composed of a multi-axis force sensor and a controller for measuring the forces (x-direction force, y-direction force and z-direction force) and sending the measured forces to the robot's controller (PLC: Programmable Logic Controller). In this paper, the force measurement and communication system was designed and fabricated by using a DSP (Digital Signal Processor). An environment test and a grinding and deburring test using an industrial robot with the force measurement and communication system with three-axis force sensor were carried out to characterize the system. The tests showed that the system could safely measure the forces from the three-axis force sensor and send the measured forces to the industrial robot's controller while the grinding and deburring test was performed. Thus, it is thought that the fabricated force measurement and communication system could be used for controlling the force for an industrial robot's grinding and deburring.