• 제목/요약/키워드: Digital Filter

검색결과 1,689건 처리시간 0.03초

잡음 영상에서의 에지 검출 (Edge detection for noisy image)

  • 구윤모;김영로
    • 디지털산업정보학회논문지
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    • 제8권3호
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    • pp.41-48
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    • 2012
  • In this paper, we propose a method of edge detection for noisy image. The proposed method uses a progressive filter for noise reduction and a Sobel operator for edge detection. The progressive filter combines a median filter and a modified rational filter. The proposed method for noise reduction adjusts rational filter direction according to an edge in the image which is obtained by median filtering. Our method effectively attenuates the noise while preserving the image details. Edge detection is performed by a Sobel operator. This operator can be implemented by integer operation and is therefore relatively fast. Our proposed method not only preserves edge, but also reduces noise in uniform region. Thus, edge detection is well performed. Our proposed method could improve results using further developed Sobel operator. Experimental results show that our proposed method has better edge detection with correct positions than those by existing median and rational filtering methods for noisy image.

Optimal filter materials for protist quantification via droplet digital PCR

  • Juhee Min;Kwang Young Kim
    • ALGAE
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    • 제39권1호
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    • pp.51-56
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    • 2024
  • The use of droplet digital polymerase chain reaction (ddPCR) has greatly improved the quantification of harmful protists, outperforming traditional methods like quantitative PCR. Notably, ddPCR provides enhanced consistency and reproducibility at it resists PCR inhibitors commonly found in environmental DNA samples. This study aimed to determine the most effective filter material for ddPCR protocols by assessing the reproducibility of species-specific gene copy numbers and filtration time across six filter types: cellulose acetate (CA), mixed cellulose ester (MCE), nylon (NY), polycarbonate (PC), polyethersulfone (PES), and polyvinylidene fluoride (PVDF). The study used two species of Chattonella marina complexes as a case study. Filtration rates were slower for NY, PC, and PVDF filters. Moreover, MCE, NY, PES, and PVDF yielded lower DNA amounts than other filters. Importantly, the CA filter exhibited the lowest variance (38-39%) and the highest determination coefficients (R2 = 0.92-0.96), indicating superior performance. These findings suggest that the CA filter is the most suitable for ddPCR quantification of marine protists, offering quick filtration and reliable reproducibility.

디지털 역지향성 배열 안테나 시스템에서 위상 추적 Settling 시간과 BER 성능 평가 (Phase Tracking Settling Time and BER Performance Evaluation in the Digital Retrodirective Array Antenna System)

  • 김소라;이승환;신동진;유흥균
    • 한국전자파학회논문지
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    • 제24권1호
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    • pp.55-63
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    • 2013
  • 디지털 역지향성 안테나 시스템은 사전 정보 없이 입사된 신호의 위상을 추적하고 위상을 반대로 돌려 수신된 방향으로 재전송을 할 수 있는 시스템으로써 아날로그 역지향성 안테나와 비교하여 수정과 업그레이드가 쉽다는 장점이 있다. 이러한 특성으로 디지털 역지향성 안테나는 고속 이동체 환경에서의 빠른 빔 추적이 가능할 것이다. 특히 빠르고 정확하게 빔을 추적하기 위해서는 설계된 디지털 역지향성 안테나 시스템의 디지털 PLL의 성능이 매우 중요하므로, 본 논문에서는 디지털 역지향 안테나 시스템에서 디지털 필터 설계에 따른 위상 추적의 동작시간과 BER 성능을 확인하였다. 1 MHz의 QAM 신호를 발생시켰으며, $30^{\circ}$의 위상 지연이 생겼을 경우의 시뮬레이션 결과, 필터의 동작이 안정할 경우 위상 공액 기법을 사용한 역지향성 안테나 시스템의 성능이 사용하지 않았을 경우의 역지향성 안테나 시스템보다 약 1 dB의 성능 차이가 나며, 필터의 동작이 불안정할 경우, 발진이 일어나 위상을 추적하지 못해 성능이 매우 나빠짐을 확인할 수 있다.

An Efficient FPGA based Real-Time Implementation Shunt Active Power Filter for Current Harmonic Elimination and Reactive Power Compensation

  • Charles, S.;Vivekanandan, C.
    • Journal of Electrical Engineering and Technology
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    • 제10권4호
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    • pp.1655-1666
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    • 2015
  • This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

Q-보정을 이용한 디지털 픽킹 필터 설계 (Design of Digital Peaking Filters Using Q-Compensation)

  • 이지하;이규하;박영철;안동순;윤대희
    • 한국음향학회지
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    • 제19권3호
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    • pp.63-71
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    • 2000
  • 본 논문에서는 표준 대역통과 필터와 무증폭 바이패스 이득의 조합을 이용한 구조에 근거하여 전문가용 디지털 오디오에 적합한 정교한 주파수응답을 갖고, 실시간 시스템에서 적은 계산량과 메모리로 구현이 용이한 2차 디지털 픽킹 필터의 설계방식을 제안하였다. 이와 같이 설계된 디지털 픽킹 필터는 이득요인에 따라 필터의 대역폭이 왜곡되는 단점을 Q-보정을 통해 제거하였으며, 컨포말 변환에 의한 설계보다 수학적으로 간단하고 구현이 용이하며, 적은 계산량 및 메모리를 필요로 한다.

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디지털 카메라에서 컬러 필터 어레이를 위한 평가 시스템 (Evaluation System for Color Filter Array (CFA) in Digital Camera)

  • 배태욱
    • 한국멀티미디어학회논문지
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    • 제20권11호
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    • pp.1741-1749
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    • 2017
  • In commercial digital-cameras, color-filter filters light according to wavelength range of color filter array (CFA) and the filtered intensities contain color information of light. Then, output data of CFA is transformed to final rendered image through demosaicing process. In image processing of digital-camera, the quality of the final rendered image is affected by optical cross talk of CFA, kind of CFA pattern etc. Basically, pattern of CFA plays important role in image quality of final image rendered by digital-camera. Therefore, an evaluation system capable of quantitatively evaluating CFA is needed. This paper proposes a novel evaluation system using existing and proposed image metrics for evaluating CFAs of digital-camera. Proposed CFA evaluation system consist of color difference in CIELAB and S-CIELAB, Structure SImilarity (SSIM), MTF50, moire starting point (MSP), and subjective preference (SP). MSP and SP are newly designed for the proposed evaluation system. Proposed evaluation system is expressed in polar coordinates to analyze the characteristics of CFA objectively and intuitively. Through simulations, we confirmed that proposed CFA evaluation system can objectively assess performance of developed CFAs.

레이더 신호 탐지용 디지털수신기 개발 (Development of a Digital Receiver for Detecting Radar Signals)

  • 차민연;최혁재;김성훈;문병진;김재윤;이종현
    • 한국군사과학기술학회지
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    • 제22권3호
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    • pp.332-340
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    • 2019
  • Electronic warfare systems are needed to be advantageous in the modern war. Many radar threat signals with various frequency spectrums and complicated techniques exist. For detecting the threats, a receiver with wide and narrow-band digital processing is needed. To process a wide-band searching mode, a polyphase filter bank has become the architecture of choice to efficiently detect threats. A polyphase N-path filter aligns the re-sampled time series in each path, and a discrete Fourier transform aligns phase and separates the sub-channel baseband aliases. Multiple threats and CW are detected or rejected when the signals are received in different sub-channels. And also, to process a narrow-band precision mode, a direct down converter is needed to reduce aliasing by using a decimation filter. These digital logics are designed in a FPGA. This paper shows how to design and develop a wide and narrow-band digital receiver that is capable to detect the threats.

소수형 디지털연산 알고리즘을 이용한 디지털 PWM의 고유한 비선형특성의 보상 (A Distortionless Digital PWM Implementation by means of a Non-integer delay FIR filtering)

  • 정진훈;정동호
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2003년도 하계종합학술대회 논문집 Ⅳ
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    • pp.2427-2430
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    • 2003
  • A uniformly sampled digital pulse-width modulation adopting a pre-compensation filter scheme for applications in high-resolution digital-to-analog data conversion is described. It is shown that linearization of the intrinsic distortion resulting in uniformly sampled pulse-width modulation can be achieved by using a non-integer delay digital filter embedded within a noise shaping re-quantizer.

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Recursive 디지털 필터 모델에 대한 역 필터링 기법 (An inverse filtering technique for the recursive digital filter model)

  • Sung-Jin Kim
    • 융합신호처리학회논문지
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    • 제5권2호
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    • pp.151-158
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    • 2004
  • 본 논문에서는 디지털 필터 모델에 대한 역 필터링 기법을 제안한다. 이 기법은 안정한 non-causal IIR 역 필터를 안정한 causal 역 필터로 변환(근사)시키는 것이다. 실제로 이 역 필터에 대한 FIR 근사 방법을 제안한다. 전역통과 시스템에 대한 역 필터의 임펄스 응답은 그 시스템에 대한 임펄스 응답의 거울 영상(mirror image) 임을 알 수 있다. 특히 전역통과 시스템에 대한 임펄스 응답이 이러한 대칭성을 갖기 때문에, 제안한 기법은 다른 시스템 보다 전역통과 시스템에 더욱 유용하다. 제안한 역 필터링 기법을 설명하기 위하여, 네 개의 예제를 제시한다. 그들 중 둘은 전역통과 필터에 대한 것이며, 다른 두 개의 예제는 IIR과 FIR 필터에 대한 것이다. 또한 컴퓨터 시뮬레이션을 통하여 제안한 기법이 잘 동작함을 보인다.

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마이크로 프로세서를 이용한 전자식 배전반 개발 (A Development of the Digital Swithchgear using the Microprocessor)

  • 변영복;조기연;구헌회;김종수
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1990년도 추계학술대회 논문집 학회본부
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    • pp.375-379
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    • 1990
  • A microprocessor-based multi-function switchgear for the protection, measurement and control of the power system is presented. For the extraction of the RMS values of the fundamental components of current and voltage signals, a simple digital filter based on cross-correlation of the distorted signal with even and odd heptagonal waves is used. The frequency response of this filter is almost identical to that of the filter based on the discrete fourier transform, while its computational requirement is far less. For the time delay element relaying, a new log-table based relaying algorithm is suggested. The suggested use of the heptagonal wave cross-correlation digital filter algorithm and a new relaying algorithm reduce the computational needs so drastically that all functions of the switchgear can be implemented on the microprocessor system. Real time testing of the implemented daboratory prototype show good practical response under different operating conditions.

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