• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.318-321
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• 2002

This paper presents a proper condition to achieve high conversion efficiency using PC1D simulator on sri-crystalline Si solar cells. Various efficiency influencing parameters such as rear surface recombination velocity and minority carrier diffusion length in the base region, front surface recombination velocity, junction depth and doping concentration in the Emitter layer, BSF thickness and doping concentration were investigated. Optimized cell parameters were given as rear surface recombination of 1000 cm/s, minority carrier diffusion length in the base region 200 $\mu\textrm{m}$, front surface recombination velocity 100 cm/s, sheet resistivity of emitter layer 100 Ω/$\square$, BSF thickness 5 $\mu\textrm{m}$, doping concentration 5${\times}$10$\^$19/ cm$\^$-3/. Among the investigated variables, we learn that a diffusion length of base layer acts as a key factor to achieve conversion efficiency higher than 19 %.

• 한국세라믹학회지
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• 제30권1호
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• pp.55-61
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• 1993

In the WSi2/CVD-Si/SiO2 polycide structure, electrode resistance and its property were studied as a function of deposition temperature and thickness of CVD-Si, diffusion condition of POCl3, and WSi2 being deposited or not. Resistivity of poly-Si is decreased with increment of thickness in the case of POCl3 diffusion of low sheet resistance, but it is increased in the case of high sheet resistance. The resistivity of amorphous-Si is generally lower than that of poly-Si. Initial sheet resistance of poly-Si/WSi2 gate electrode is affected by the thickness and resistance of poly-Si layer, but final resistance after anneal, 900$^{\circ}C$/30min/N2, is only determined by WSi2 layer. Flourine diffuses into SiO2, but tungsten does not. In spite of out-diffusion of phosphorus into WSi2 layer, the sheet resistance is not changed.

• Korean Journal of Hydrosciences
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• 제8권
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• pp.111-123
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• 1997

A one-dimensional eddy diffusion model and a mixed-layer model are developed and applied to simulate the vertical temperature profiles in lakes. Also the running result of each method are compared and analyzed. In an eddy diffusion model, molecular diffusivity is neglected and eddy diffusivity which does not need lake-specific fitting parameter and constant lake's level are applied. The heat exchanges at the water surface and the bottom are formulated by the energy balance and zero energy gradient, respectively. In a mixed-layer model, two layers approach which has a constant thickness is adopted. The application of these models which use explicit finite difference and Runge-Kutta methods respectively demonstrates that the models simulate water temperatures efficiently.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제52권10호
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• pp.451-457
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• 2003

The silicon wafer is stable status at room temperature, but it is weak at high temperatures which is necessary for it to be fabricated into a power semiconductor device. During thermal diffusion processing, a high temperature produces a variety thermal stress to the wafer, resulting in device failure mode which can cause unwanted oxide charge or some defect. This disrupts the silicon crystal structure and permanently degrades the electrical and physical characteristics of the wafer. In this paper, the electrical characteristics of a single oxide layer due to high temperature diffusion process, wafer resistivity and thickness of polyback was researched. The oxide quality was examined through capacitance-voltage characteristics, defect density and BMD(Bulk Micro Defect) density. It will describe the capacitance-voltage characteristics of the single oxide layer by semiconductor process and device simulation.

• 대한설비공학회:학술대회논문집
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• 대한설비공학회 2005년도 동계학술발표대회 논문집
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• pp.9-14
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• 2005

The purpose of this study is to predict VOCs emission rates from multi-layers materials, which are composed of single-layer materials having various VOCs emission rates, by using effective diffusion coefficients of the single-layer materials. The study was consisted of two parts; the one is the prediction of VOCs emission rates from multi-layer materials through numerical methods. The other is the measurement of VOCs emissions rates of wall composite and floor composite in Mock-up rooms for comparing the prediction and the experiments' values. The results of the study show that the short-term VOCs emission rates of multi-layers materials can be predicted from the effective diffusion coefficients of single materials in odor accuracy.

• E2M - 전기 전자와 첨단 소재
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• 제7권4호
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• pp.281-288
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• 1994

According to spread volume of B(BiPbCuO) layer, composition ratio and each stage of sintering process, we studied stability of high Tc superconductor phase and generation and growth movement of superconducting phase. The dual layer composed of SrCaCuO and BiPbCuO compound were prepared to develop the Bi-2223 superconductor[108K] through interaction and diffusion during sintering process. The dual layer samples were sintered at 830.deg. C for 0-210 hours. From the result, the optimum conditions were : spread volume(A:B=1:0.6), sintering time(210h) and composition ratio(A:S $r_{2}$C $a_{2}$C $u_{2}$- $O_{x}$, B:B $i_{1.9}$P $b_{0.5}$C $u_{3}$ $O_{y}$) at 830.deg. C.. C.C.C.

• 정보보호학회논문지
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• 제14권1호
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• pp.91-99
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• 2004

Iwata 등은 SPN 구조에 기반한 블록 암호들 중 Serpent에 대한 의사 난수성을 분석하였다. 그들은 Serpent의 구조를 최대한 보존한 상태에서 의사 난수성을 분석하기 위하여 Serpent의 Diffusion layer의 특성을 그대로 보존하여 일반화 한 후 이론을 전개하였다. 본 논문에서는 Serpent가 취한 Diffusion layer 뿐만 아니라 SPN 구조에 기반한 블록 암호들이 취할 수 있는 임의의 Diffusion layer에 대하여 적용 가능한 일반적인 이론을 도출해 낼 것이다. 또한 이러한 일반적인 이론을 Serpent, Crypton, Rijindael 등과 같은 블록 암호들에 적용한 결과를 제시할 것이다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2010년도 제39회 하계학술대회 초록집
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• pp.311-312
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• 2010

The fabricated photovoltaic cells based on PIN heterojunctions, in this study, have a structure of ITO/poly(3, 4-ethylenedioxythiophene)-poly(styrenesulfonate)(PEDOT:PSS)/donor/donor:C60(10nm)/C60(35nm)/2, 9-dimethyl-4, 7-diphenyl-1, 10-phenanthroline(8nm)/Al(100nm). The thicknesses of an active layer(donor:C60), an electron transport layer(C60), and hole/exciton blocking layer(BCP) were fixed in the organic photovoltaic cells. We investigated the performance characteristics of the PIN organic photovoltaic cells with copper phthalocyanine(CuPc), tetracene and pentacene as a hole transport layer. Discussion on the photovoltaic cells with CuPc, tetracene and pentacene as a hole transport layer is focussed on the dependency of the power conversion efficiency on the deposition rate and thickness of hole transport layer. The device performance characteristics are elucidated from open-circuit-voltage(Voc), short-circuit-current(Jsc), fill factor(FF), and power conversion efficiency($\eta$). As the deposition rate of donor is reduced, the power conversion efficiency is enhanced by increased short-circuit-current(Jsc). The CuPc-based PIN photovoltaic cell has the limited dependency of power conversion efficiency on the thickness of hole transport layer because of relatively short exciton diffusion length. The photovoltaic cell using tetracene as a hole transport layer, which has relatively long diffusion length, has low efficiency. The maximum power conversion efficiencies of CuPc, tetracene, and pentacene-based photovoltaic cells with optimized deposition rate and thickness of hole transport layer have been achieved to 1.63%, 1.33% and 2.15%, respectively. The photovoltaic cell using pentacene as a hole transport layer showed the highest efficiency because of dramatically enhanced Jsc due to long diffusion length and strong thickness dependence.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2009년도 제38회 동계학술대회 초록집
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• pp.229-229
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• 2010

With the scaling down of ultra large integrated circuits (ULSI) to the sub-50 nm technology node, the need for an ultra-thin, continuous and conformal diffusion barrier and Cu seed layer is increasing. However, diffusion barrier and Cu seed layer formation with a physical vapor deposition (PVD) method has become difficult as the technology node is reduced to 30 nm and beyond. Recent work on self-forming barrier processes using PVD Cu alloys have attracted great attention due to the capability of conformal ultra-thin barrier formation using a simple technique. However, as in the case of the conventional barrier and Cu seed layer, PVD of the Cu alloy seed layer will eventually encounter the difficulty in conformal deposition in narrow line trenches and via holes. Atomic layer deposition (ALD) has been known for its good step coverage and precise thickness control, and is a candidate technique for the formation of a thin conformal barrier layer and Cu seed layer. Conformal Cu-Mn seed layers were deposited by plasma enhanced atomic layer deposition (PEALD) at low temperature ($120^{\circ}C$), and the Mn content in the Cu-Mn alloys were controlled form 0 to approximately 10 atomic percent with various Mn precursor feeding times. Resistivity of the Cu-Mn alloy films decreased by annealing due to out-diffusion of Mn atoms. Out-diffused Mn atoms were segregated to the surface of the film and interface between a Cu-Mn alloy and $SiO_2$, resulting in self-formed $MnO_x$ and $MnSi_xO_y$, respectively. No inter-diffusion was observed between Cu and $SiO_2$ after annealing at $500^{\circ}C$ for 12 h, indicating an excellent diffusion barrier property of the $MnSi_xO_y$. The adhesion between Cu and $SiO_2$ was enhanced by the formation of $MnSi_xO_y$. Continuous and conductive Cu-Mn seed layers were deposited with PEALD into 32 nm $SiO_2$ trench, enabling a low temperature process, and the trench was perfectly filled using electrochemical plating (ECD) under conventional conditions. Thus, it is the resultant self-forming barrier process with PEALD Cu-Mn alloy film as a seed layer for plating Cu that has further potential to meet the requirement of the smaller than 30 nm node.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2009년도 춘계학술대회 논문집
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• pp.221-222
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• 2009