• Title/Summary/Keyword: Diffusion Device

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Characteristics of a Carbon Nanotube-based Tunnel Magnetoresistance Device

  • Kim, Jinhee;Woo, Byung-Chill;Kim, Jae-Ryoung;Park, Jong-Wan;So, Hye-Mi;Kim, Ju-Jin
    • Journal of Magnetics
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    • v.7 no.3
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    • pp.98-100
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    • 2002
  • Tunnel magnetoresistive devices using an individual multi-walled carbon nanotube were fabricated and their low-temperature electrical transport propertiers were investigated. With the ferromagnetic Co electrodes, the multi-walled carbon nanotube exhibited hysteretic magnetoresistance curve at low temperatures. Depending on the temperature and the bias current, the magnetoresistance ratio can be as high as 16% at the temperature of 2.2 K. Such high magnetoresistance ratio indicates a long diffusion length of the multi-walled carbon nanotube.

A development of the 3-dimensional stationary drift-diffusion equation solver (3차원 정상상태의 드리프트-확산 방정식의 해석 프로그램 개발)

  • 윤현민;김태한;김대영;김철성
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.34D no.8
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    • pp.41-51
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    • 1997
  • The device simulator (BANDIS) which can analyze efficiently the electrical characteristics of the semiconductor devices under the three dimensional stationary conditions on the IBM PC was developed. Poisson, electon and hole continuity equations are discretized y te galerkin method using a tetrahedron as af finite element. The frontal solver which has exquisite data structures and advanced input/output functions is dused for the matrix solver which needs the highest cost in the three dimensional device simulation. The discretization method of the continuity equations used in BANDIS are compared with that of the scharfetter-gummel method used in the commercial three-dimensional device. To verify an accuracy and the efficiency of the discretization method, the simulation results of the PN junction diode and the BJT from BANDIS are compared with those of the commercial three-dimensiional device simulator such as DAVINCI. The maximum relative error within 2% and the average number of iterations needed for the convergence is decreased by more than 20%. The total simulation time of the BJT with 25542 nodes is decreased to about 60% compared with that of DAVINCI.

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Fabrication of SOI FinFET devices using Aresnic solid-phase-diffusion (비소 고상확산방법을 이용한 MOSFET SOI FinFET 소자 제작)

  • Cho, Won-Ju;Koo, Hyun-Mo;Lee, Woo-Hyun;Koo, Sang-Mo;Chung, Hong-Bay
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.133-134
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    • 2006
  • A simple doping method to fabricate a very thin channel body of the n-type fin field-effect-transistor (FinFET) with a 20 nm gate length by solid-phase-diffusion (SPD) process is presented. Using As-doped spin-on-glass as a diffusion source of arsenic and the rapid thermal annealing, the n-type source-drain extensions with a three-dimensional structure of the FinFET devices were doped. The junction properties of arsenic doped regions were investigated by using the $n^+$-p junction diodes which showed excellent electrical characteristics. Single channel and multi-channel n-type FinFET devices with a gate length of 20-100 nm was fabricated by As-SPD and revealed superior device scalability.

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Characteristic of Strength Increase in Clayey Soil by Electrokinetic Injection (동전기 주입에 의한 점성토의 강도증가 특성)

  • Kim, Ki-Nyun;Kim, Jong-Yun;Han, Sang-Jae;Kim, Soo-Sam
    • Proceedings of the Korean Geotechical Society Conference
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    • 2005.03a
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    • pp.910-915
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    • 2005
  • In this study a series of tests(bench scale test) are carried out for increasing in strength of clayey soil by EK-Injection method. In addition, the effects of strength increase in the treated sample are measured by operating the vane shear test device during 25 days at 5 days intervals in order to estimate the effect of ground improvement caused by diffusion. The test results show that the strength increase was developed approximately double to 7 times in comparison to initial shear strength, and outstanding strength increase was created as much as 7 times while injecting the sodium silicate and phosphoric acid in anolyte and catholyte. In addition, the measured shear strength with the influence of diffusion and reduction of water-content had a tendency to converge in constant value in proportion to elapsed time. As a result of this study, strength increment developed by the influence of EK-Injection and diffusion rather than the reduction of water-content were high as 1000% on average

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Development of Optical Phase Modulator (광위상변조기 개발)

  • 김성구;윤형도;윤대원
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1998.06a
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    • pp.97-99
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    • 1998
  • A optical phase modulator of 5Gbps was fabricated on LiNbO$_3$ by Ti diffusion for optical communications. In this Paper the pigtailing, mode patterns and insertion loss were discussed. And the device Properties of driving voltage and bandwidth were measured.

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(Development of 100[W] Border Light using Color Mixing Technique by Simple-Inverse Matching Method) (Simple-Inverse Matching 혼색기법을 이용한 100[W] 무대조명 개발)

  • Youn, Jin-Sik;Song, Sang-Bin;Lim, Young-Cheol;Park, Joung-Wook;Hong, Jin-Pyo
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.12
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    • pp.38-46
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    • 2010
  • For the development of 100[W] stage lighting, quantitative and uniform color mixing that applied through color adopted Simple-Inverse matching so that color mixing can be possible along Black Body Locus. R,G,B(Red, Green, Blue) LED(Light Emitting Diode) arrangement through LED package character analysis, LED module, and the characteristic of device were considered for uniform color mixing. A distance changeable optical device was built to assure high uniformity and high diffusion of not only the middle of diffusion side but also the border side. Also, we developed the control power circuit that can expand up to 6 channels which are possible for quantitative color mixing, and the high uniformity and high quantified border light for color mixing control and the verification of color mixing characteristics by composing GUI(Graphical user interface) including color mixing simulator. By presenting the experimental results of light color control, we proved the usefulness of our developed border light and the proposed color mixing method.

The study on characterization and fabrication of current limiting device using HTSC-thick film (고온초전도후막을 이용한 전류제한소자제작 및 특성연구)

  • Lim, Sung-Hun;Kang, Hyeong-Gon;Chung, Dong-Chul;Du, Ho-Ik;Han, Byoung-Sung
    • 한국초전도학회:학술대회논문집
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    • v.9
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    • pp.242-246
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    • 1999
  • For the fabrication of fault current limiting device using HTSC thick film, YBa$_2Cu_3O_x$ superconducting thick film was formed by surface diffusion process of the Y$_2BaCUO_5$ and the mixed compound of (3BaCuO$_2$+2CuO) expected to be liquid phase above the peritectic temperature of YBa$_2Cu_3O_x$. For the surface diffusion, the compounds of 3BaCuO$_2$+2CuO mixed with binder material was patterned on Y$_2BaCUO_5$ substrate by the screen printing method. After proper sintering, the characteristics of current limit on thick film fabricated was measured. The thick film was able to limit the current from 2.8213 mA$_{rms}$nu to 4.2034 mA$_{rms}$ with 500${\omega}$ load resistance, and from 4.1831 mA$_{rms}$ to 4.2150 mA$_{rms}$ with 10${\omega}$ load resistance.

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Study on improvement of on-state voltage drop characteristics According to Variation of JFET region of IGBT structure (IGBT 구조의 JFET영역 변화에 따른 온-상태 전압강하 특성 향상을 위한 연구)

  • Ahn, Byoung-Sup;Kang, Ey-Goo
    • Journal of IKEEE
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    • v.22 no.2
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    • pp.339-343
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    • 2018
  • Power semiconductors are semiconductors capable of controlling power over 1W and are mainly used as switches. This power semiconductor device has been developed with the goal of reducing power consumption and high breakdown voltage. This research was analyzed electrical characteristics of IGBT(Insulated Gate Biopolar Transistor) according to diffusion length of JFET region. The Diffusion length of JFET region was controlled by temperature and time using T-CAD simulator. As a result of experiments, we could obtain 1.14V low on state voltage drop by fixing 1440V breakdown voltage.

Design and Fabrication of InP/InGaAs PIN Photodiode for Horizontally Integrated OEIC's (수평집적형 광전자집적회로를 위한 InP/InGaAs PIN 광다이오드의 설계 및 제작)

  • 여주천;김성준
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.29A no.4
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    • pp.38-48
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    • 1992
  • OEIC(Optoelectronic Integrated Circuit)'s can be integrated horizontally or vertically. Horizontal integration approach is, however, more immune to parasitic and more universally applicable. In this paper, a structural modeling, fabrication and characterization of PIN photodiodes which can be used in the horizontal integration are performed. For device modeling, we build a transmission line model from 2-D device simulation, from which lumped model parameters are extracted. The speed limits of the PIN photodiodes can also be calculated under various structural conditions from the model. Thus optimum design of horizontally integrated PIN photodiodes for high speed operation are possible. Such InGaAs/InP PIN photodiodes for long-wavelength communications are fabricated using pit etch, epi growth, planarization, diffusion and metallization processes. Planarization process using both RIE and wet etching and diffusion process using evaporated Zn$_{3}P_{2}$ film are developed. Characterization of the fabricated devices is performed through C-V and I-V measurements. At a reserve bias of 10V, the dark current is less than 5nA and capacitance is about 0.4pF. The calculated bandwidth using the measured series resistance and capacitance is about 4.23GHz.

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