• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.5
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• pp.738-744
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• 2016

Current rating of a power cable can be calculated by the maximum allowable temperature in an insulating material considering the heat transfer from cable conductor. Therefore, it is very important to calculate the current rating using electrical equivalent circuit by calculated cable thermal circuit parameters but, it has not been fully investigated yet. In this paper, in order to determine the current rating of power cable, conventional calculation method has been reviewed considering the conductor resistance, loss factor of sheath, dielectric losses and thermal resistances based on the maximum allowable temperature of 345 kV $2500mm^2$ XLPE cable. To confirm the calculation result of the current rating, the conductor temperature should be examined whether it reaches the maximum allowable temperature by the thermal equivalent circuit of the cable. Then, utilizing EMTP (Electro-Magnetic Transient Program) which is a conventional program for electrical circuit, the thermal equivalent circuit was transformed to an electric equivalent circuit using an analogous relationship between thermal circuit and electrical circuit, and temperature condition including cable conductor, sheath, cable jacket could be calculated by the current rating of 345 kV $2500mm^2$ XLPE cable.

• Journal of the Korean Ceramic Society
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• v.43 no.11 s.294
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• pp.715-723
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• 2006

Perovskite oxide materials are very important for the electronics industry, because they exhibit promising properties. With an interest in the obvious applications, significant effort has been invested in the growth of highly crystalline epitaxial perovskite oxide thin films in our laboratory. And the desired structure of films was formed to achieve excellent properties. $Y_1Ba_2Cu_3O_{7-x}$ (YBCO) superconducting thin films were simultaneously deposited on both sides of 3 inch wafer by inverted cylindrical sputtering. Values of microwave surface resistance R$_2$ (75 K, 145 GHz, 0 T) smaller than 100 m$\Omega$ were reached over the whole area of YBCO thin films by pre-seeded a self-template layer. For implementation of voltage tunable high-quality varactor, A tri-layer structured SrTiO$_3$ (STO) thin films with different tetragonal distortion degree was prepared in order to simultaneously achieve a large relative capacitance change and a small dielectric loss. Highly a-axis textured $Ba_{0.65}Sr_{0.35}TiO_3$ (BST65/35) thin films was grown on Pt/Ti/SiO$_2$/Si substrate for monolithic bolometers by introducing $Ba_{0.65}Sr_{0.35}RuO_3$ (BSR65/35) thin films as buffer layer. With the buffer layer, the leakage current density of BST65/35 thin films were greatly reduced, and the pyroelectric coefficient of $7.6\times10_{-7}$ C $cm^{-2}$ $K^{-1}$ was achieved at 6 V/$\mu$m bias and room temperature.

• Journal of the Microelectronics and Packaging Society
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• v.6 no.4
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• pp.41-48
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• 1999

Silica is the most popular materials as a filler of EMC for microelectronic packaging. However, because of its low thermal conductivity, the use of silica is restricted to parts requiring high thermal dissipation. The superior fluidity of EMC can be achieved with a combination of filler size distribution. In this study, physical properties of EMC filled with the crystalline silica(13$\mu\textrm{m}$) which have high fluidity and low cost and the AlN(2 $\mu\textrm{m}$) which have high thermal conductivity and low coefficient of thermal expansion were evaluated by changing the AlN/silica ratios. As a result of the evaluation of physical properties of EMC, the optimum mixing ratio of AlN/crystalline silica was 0.3/0.7. In this condition, binary mixture(AlN/crystalline silica) filled EMC showed superior properties, i.e., in the thermal conductivity, CTE, dielectric constant, flexural strength, and thermal shock resistance without reduction of fluidity.

• Journal of Industrial and Engineering Chemistry
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• v.68
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• pp.399-405
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• 2018

We report the fabrication of organic field-effect transistors (OFETs) via spray coating of electrochemically exfoliated graphene (EEG) and conducting polymer hybrid as electrodes. To reduce the roughness and sheet resistance of the EEG electrodes, subsequent coating of conducting polymer (poly(3,4-ethylenedioxythiophene)-poly(styrenesulfonate) (PEDOT:PSS)) and acid treatment was performed. After that, active channel layer was developed by spin coating of semiconducting poly(3-hexylthiophene) on the hybrid electrodes to define the bottom gate bottom contact configuration. The OFET devices with the EEG/PEDOT:PSS hybrid electrodes showed a reasonable electrical performances (field effect mobility = $0.15cm^2V^{-1}\;s^{-1}$, on/off current ratio = $10^2$, and threshold voltage = -1.57V). Furthermore, the flexible OFET devices based on the Polydimethlsiloxane (PDMS) substrate and ion gel dielectric layer exhibited higher electrical performances (field effect mobility = $6.32cm^2V^{-1}\;s^{-1}$, on/off current ratio = $10^3$, and threshold voltage = -1.06V) and excellent electrical stability until 1000 cycles of bending test, which means that the hybrid electrode is applicable to various organic electronic devices, such as flexible OFETs, supercapacitors, organic sensors, and actuators.

• Progress in Superconductivity and Cryogenics
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• v.23 no.3
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• pp.51-54
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• 2021

The DC system has less power loss compared to the AC system because there is no influence of frequency and dielectric loss. However, the zero-crossing point of the current is not detected in the event of a short circuit fault, and it is difficult to interruption due to the large fault current that occurs during the opening, so the reliability of the DC breaker is required. As a solution to this, an LC resonance DC circuit breaker combined a superconducting element has been proposed. This is a method of limiting the fault current, which rises rapidly in case of a short circuit fault, with the quench resistance of the superconducting element, and interruption the fault current passing through the zero-crossing point through LC resonance. The superconducting current limiting element combined to the DC circuit breaker plays an important role in reducing the electrical burden of the circuit breaker. However, at the beginning of a short circuit fault, superconducting devices also have a large electrical burden due to large fault currents, which can destroy the element. In this paper, the reactor is connected to the source side of the circuit using PSCAD/EMTDC. After that, the change of the fault current according to the reactor capacity and the electrical burden of the superconducting element were confirmed through simulation. As a result, it was confirmed that the interruption time was delayed as the capacity of the reactor connected to the source side increased, but peak of the fault current decreased, the zero-crossing point generation time was shortened, and the electrical burden of the superconducting element decreased.

• Journal of IKEEE
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• v.26 no.3
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• pp.500-505
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• 2022

In this study, we designed oxide thin-film transistors (TFTs) with dual gate and tri layered split channels, and investigated the structural effect of the TFTs on the electrical characteristics. The dual gates played a key role in increasing the driving current, and the channel structure of tri layers and split form contributed to the increase in the carrier mobility. The tri layered channels consisting of the a-ITGZO and two ITO layers inserted between the gate dielectric and a-ITGZO led to the increase in the on-current by using ITO layers with high conductivity, and the split channels lowered series resistance of the channels. Compared with the mobility (15 cm²/V·s) of the single gate a-ITGZO TFT, the mobility (134 cm²/V·s) of the dual gate tri-layer split channel TFT was remarkably enhanced by the structural effect.

• Journal of Advanced Navigation Technology
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• v.26 no.6
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• pp.510-515
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• 2022

In this paper, a microstrip patch sensor antenna (MPSA) for detecting the concentration of an ethanol-water solution in a microliter volume is proposed. A rectangular slot was added at the radiating edge of the patch to increase the sensitivity to the relative permittivity change. To improve a low input resistance caused by placing an ethanol-water solution, which is a polar liquid with high dielectric constant and high loss tangent, on the patch, a quarter-wave impedance transformer was added between the 50-ohm feedline and the patch, and the MPSA was fabricated on a 0.76 mm-thick RF-35 substrate. A cylindrical container was made of acryl, and 15 microliters of the ethanol-water solution was tested from 0% to 100% of ethanol concentration at 20% intervals. Experiment results show that the resonant frequency increased from 1.947 GHz to 2.509 GHz when the ethanol concentration of the ethanol-water solution was increased from 0% to 100%, demonstrating the performance as a concentration detecting sensor.

• Journal of the Korea Institute of Military Science and Technology
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• v.27 no.3
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• pp.311-318
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• 2024

In this paper, a design for a radio frequency(RF) and infrared(IR) absorber with metasurfaces is discussed in microwave frequency bands. The RF absorber includes double layers of metasurfaces to operate in S- and X-bands. Effects of sheet resistance of the metasurfaces and thicknesses of dielectric supporting layers on reflection responses are investigated. An IR stealth layer incorporates an array of conductive grids with slits to reflect IR signals but to transmit RF signals and visible rays. Periodicity of the grids and slits is studied for transmission responses in the X-band and a surface area ratio. Reflection responses of the RF/IR multispectral absorber are found to be lower than -10 dB and -16 dB in the S- and X-bands, respectively, from full-wave simulation. Finally, the RF/IR multispectral absorber is fabricated and its reflection responses are measured to verify designed performance.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.5
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• pp.516-522
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• 2020

Water trees can cause considerable damage to the performance of underground cables. Theymay formwithin the dielectric used in buried or water-immersed high voltage cables. They grow in a bush-like or tree-like form, often taking decades before causing damage to a cable's performance. They are usually found on very old underground cables, often in an inaccessible place. It is costly and time-consuming to detect watertrees in underground cables. Tree detection technology, including mathematical modeling,can reduce the maintenance cost and time necessary for detecting these trees.To simulate detection of water trees in this study, a mathematical model ofan XLPE cable and a water tree were developed. The complex water tree structure was simplified, based on two identified patterns of aventedtree. A Matlab simulation was performed to calculate and analyze the capacitance and resistance of a cable insulation layer,based on growth of a watertree. Capacitance size increased about 0.025×10^-13[Farads/mm] compared to normal when the tree area of the cable was advanced to 95% of the insulation layer. The resistance value decreased by about 0.5×10¹⁶[ohm/m]. These changesand changesshowninaBurkes paper physical modeling simulation are similar.The value of mathematical modeling for detecting water trees and damage to underground cables has been demonstrated.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.10-10
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• 2008

Silicide is inevitable for CMOSFETs to reduce RC delay by reducing the sheet resistance of gate and source/drain regions. Ni-silicide is a promising material which can be used for the 65nm CMOS technologies. Ni-silicide was proposed in order to make up for the weak points of Co-silicide and Ti-silicide, such as the high consumption of silicon and the line width limitation. Low resistivity NiSi can be formed at low temperature ($\sim500^{\circ}C$) with only one-step heat treat. Ni silicide also has less dependence of sheet resistance on line width and less consumption of silicon because of low resistivity NiSi phase. However, the low thermal stability of the Ni-silicide is a major problem for the post process implementation, such as metalization or ILD(inter layer dielectric) process, that is, it is crucial to prevent both the agglomeration of mono-silicide and its transformation into $NiSi_2$. To solve the thermal immune problem of Ni-silicide, various studies, such as capping layer and inter layer, have been worked. In this paper, the Ni-silicide utilizing Pd stacked layer (Pd/Ni/TiN) was studied for highly thermal immune nano-scale CMOSFETs technology. The proposed structure was compared with NiITiN structure and showed much better thermal stability than Ni/TiN.