• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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• pp.1327-1330
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• 2005

The color shifting from yellow to green of electroluminescent emission from ZnS: Cu alternating current thick film electroluminescent (ACTFEL) devices has been achieved by changing the Mg composition in the phosphor layers. The commission international de l'Eclairge (CIE) color co-ordinates of the ACTFEL devices prepared from these phosphor layers show a shifting from yellow (x=0.45, y=0.52) towards green (x=0.36, y=0.58). The various parameters influencing the emission intensity were also investigated.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.28-31
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• 2003

We have investigated the electrical characteristics of the organic light emitting diodes (OLEDs) using the numerical device simulation. The current-voltage characteristics, the charge carrier concentrations, and the recombination rate profiles are presented. The simulation results of the effects of the various device parameters on the device characteristics are discussed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 C
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• pp.1556-1558
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• 2003

IGCT devices is a superior devices for power conversion purpose. The basic structure of the IGCT devices is same as that of GTO thyristor. This makes the blocking voltage higher and controllable on-state current higher. In this paper, we present static and dynamic characteristics of 4.5 kV PT-type IGCT devices as a function of minority carrier lifetime, n-base thickness and n-buffer thickness. We should choose proper structural parameters for good electrical characteristics of GCT devices.

• 센서학회지
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• 제31권2호
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• pp.71-78
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• 2022

Wearable devices have the potential to revolutionize future medical diagnostics and personal healthcare. The integration of biosensors into scalable form factors allow continuous and noninvasive monitoring of key biomarkers and various physiological indicators. However, conventional wearable devices have critical limitations owing to their rigid and obtrusive interfaces. Recent developments in functional biocompatible materials, micro/nanofabrication methods, multimodal sensor mechanisms, and device integration technologies have provided the foundation for novel skin-interfaced bioelectronics for advanced and user-friendly wearable devices. Nonetheless, it is a great challenge to satisfy a wide range of design parameters in fabricating an authentic skin-interfaced device while maintaining its edge over conventional devices. This review highlights recent advances in skin-compatible materials, biosensor performance, and energy-harvesting methods that shed light on the future of wearable devices for digital health and personalized medicine.

• 센서학회지
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• 제29권5호
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• pp.324-327
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• 2020

The impact of output conductance (g_o) on the short-circuit current-gain cut-off frequency (f_T) in In_0.8Ga_0.2As high-electron-mobility transistors (HEMTs) on an InP substrate was investigated. An attempted was made to extract the values of f_T in a simplified small-signal model (SSM) of the HEMTs, derive an analytical formula for f_T in terms of the extrinsic model parameters of the simplified SSM, which are related to the intrinsic model parameters of a general SSM, and verify its validity for devices with L_g from 260 to 25 nm. In long-channel devices, the effect of the intrinsic output conductance (g_oi) on f_T was negligible. This was because, from the simplified SSM perspective, three model parameters, such as g_{m_ext}, C_{gs_ext} and C_{gd_ext}, were weakly dependent on g_oi. However, in short-channel devices, g_oi was found to play a significant role in degrading f_T as L_g was scaled down. The increase in g_oi in short-channel devices caused a considerable reduction in g_{m_ext} and an overall increase in the total extrinsic gate capacitance, yielding a decrease in f_T with g_oi. Finally, the results were used to infer how f_T is influenced by g_oi in HEMTs, emphasizing that improving electrostatic integrity is also critical importance to benefit fully from scaling down L_g.

• Journal of Power Electronics
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• 제10권5호
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• pp.491-497
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• 2010

This paper proposes an estimation algorithm for the electrical parameters of synchronous reluctance motors (SynRMs) by using a synchronous PI current regulator at standstill. In reality, the electrical parameters are only measured or estimated in limited conditions without fully considering the effects of the switching devices, connecting wires, and magnetic saturation. As a result, the acquired electrical parameters are different from the real parameters of the motor drive system. In this paper, the effects of switching devices, connecting wires, and the magnetic saturation are considered by simultaneously using the short pulse and closed loop equations of resistance and synchronous inductances. Therefore, the proposed algorithm can be easily and safely implemented with a reduced measuring time. In addition, it does not need any external or additional measurement equipment, information on the motor's dimensions, and material characteristics as in the case of FEM. Several experimental results verify the effectiveness of the proposed algorithm.

• Journal of Power Electronics
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• 제18권4호
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• pp.1255-1267
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• 2018

Parasitic parameters have a larger influence on Silicon Carbide (SiC) devices with an increase of the switching frequency. This limits full utilization of the performance advantages of the low switching losses in high frequency applications. By combining a theoretical analysis with a experimental parametric study, a mathematic model considering the parasitic inductance and parasitic capacitance is developed for the basic switching circuit of a SiC MOSFET. The main factors affecting the switching characteristics are explored. Moreover, a fast-switching double pulse test platform is built to measure the individual influences of each parasitic parameters on the switching characteristics. In addition, guidelines are revealed through experimental results. Due to the limits of the practical layout in the high-speed switching circuits of SiC devices, the matching relations are developed and an optimized layout design method for the parasitic inductance is proposed under a constant length of the switching loop. The design criteria are concluded based on the impact of the parasitic parameters. This provides guidelines for layout design considerations of SiC-based high-speed switching circuits.

• ETRI Journal
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• 제30권6호
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• pp.757-764
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• 2008

In this paper, we present a design evaluation system with visualization and interaction of mobile devices using virtual-reality-based prototypes which can be used to easily change design parameters and simulate embedded software. To evaluate and predict affective-engineering-based design preferences for mobile devices under a virtual environment, we have developed a high quality visualization platform which creates images that look similar to real mobile devices in addition to real-time simulation of realistic motions and functions of mobile devices. To support a quantitative usability test scenario for external design shape, we also have built a system which consists of a mixed-reality-based testing platform for measuring hand load.

• Journal of Korean Vacuum Science & Technology
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• 제3권1호
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• pp.30-32
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• 1999

Electron beam trajectory simulation results on the high voltage FED with cone-type field emitters predict that the cross-talk phenomena would be seen due to the divergence of the electron beam. In this study, computer simulations with design of experiment technique and the SNU-FEAT program were carried out for five input parameters of the aperture focusing structure. The results tell that the focusing voltage is a dominant factor. And, the beam divergence index could be reduced to 10.7$\mu\textrm{m}$ with the aperture focusing structure, however, the operating voltage of the field emitter is predicted to increase by 40% maximum.

• 한국전기전자재료학회논문지
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• 제15권12호
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• pp.1021-1026
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• 2002

As the development of semiconductor process technology continue to advance, ICs continue their trend toward higher performance low power system-on-chip (SOC). These circuits require on board multi power supply. In this paper, a 0.5 ㎛ dual date oxide CMOS Process technology for multi-power application is demonstrated. 5 V and 20 V devices fabricated by proposed process is measured. From 5 V devices using dual gate precess, we got almost the same characteristics as are obtained from standard 5 V devices. And the characteristics of the 20 V device demonstrates that 3 ㎛ devices with minimum gate length are available without reliability degradation. Electrical parameters in minimum 3 ㎛ devices are 520 ㎂/㎛ current density, 120 ㎷ DIBL, 24 V BV for NMOS and ,350 ㎂/㎛ current density, 180 ㎷ DIBL, 26 V BV for PMOS, respectively.