• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.135-138
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• 2001

This paper presents micro step driving method using VHDL(Very high speed integrated circuit Hardware Description Language) which can configure CPLD(Complex Programmable Logic Device). Using VHDL which can do abstractive programming is similar to high level language. The whole block divided into five parts with freq. divide part, saw-tooth wave generation part, sine-cosine wave generation part, comparative part, out part. In the result of this study, peripheral circuits are to be simple and using LPM(Library of Parameterized Modules) is more easily to configure circuit. It is easy to verify and implement by using VHDL. To subdivide one natural step, we confirm that using micro step driver is expected that the rotor motion is stepless very smooth.

• Proceedings of the KSRS Conference
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• 2003.11a
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• pp.219-221
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• 2003

With regarding to web GIS, OGC promotes WFS allowing a client to retrieve geospatial data encoded in GML which is a modeling language to encode the semantics, syntax and schema of geospatial information resources. Even though GML provides benefits for geographic description, it is too heavy to be processed by mobile devices. In order to address the issue, this paper evaluates GML service with WFS server and GML viewers. Through this paper, we get analyses of properties of GML geospatial data and the effects on wireless devices, which are expected to be fundamental materials onto a design of mobile applications.

• Journal of information and communication convergence engineering
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• v.7 no.3
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• pp.399-403
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• 2009

In IEEE 802.15.1 (Bluetooth) Ad-hoc networks, the frequency is resolved by the specific part of the digits of the Device clock and the Bluetooth address of the Master device in a given piconet. The piconet performs a fast frequency hopping scheme over 79 carriers of 1-MHz bandwidth. Since there is no coordination between different piconets, packet collisions may occur if two piconets are located near one another. In this paper, we proposed a software/hardware co-design of an adaptive frequency decision mechanism so that more than two different kinds of wireless devices can stay connected without frequency collision. Suggested method was implemented with C program and HDL (Hardware Description Language) and automatically synthesized and laid out. The adaptive frequency hopping circuit was implemented in a prototype and showed its operation at 24MHz correctly.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.741-744
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• 2006

There are a lot of on-going researches on various security technologies for guaranteeing the safety of home network systems. Until now, a few security technologies such as device authentication mechanism, user authentication mechanism, access control mechanism and firewall are generally deployed, and they are just simple. However, we need some representation skills in order to efficiently define the home network and describe the security for managing and performing these security mechanisms. So, in this paper, we define the xHDL language to define and describe the security components of home network and analyze the semantics of each components.

• The Journal of Engineering Research
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• v.6 no.1
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• pp.111-124
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• 2004

The advanced semiconductor technology and electronic design automation(EDA) tools make it possible to implement the system on the programmable logic devices. The electronic design method is also changing from schematic capture to hardware description language. In this paper, I present the architecture of multi-dimensional digital filter which can be efficiently implemented on PLDs. This is based on the former research results which are called algorithm decomposition technique. Algorithm decomposition technique is used to obtain the computational primitive from the state space equations of the multi-dimensional digital filtering algorithm. The obtained computational primitive is designed with VHDL. This can be used to implement the filtering system as a component. The designed filtering system is implemented on the PLD. Therefore, the filter can be upgradable on system. It is greatly reduced the time-to-market time of the system that is based on the multi-dimensional filter.

• Journal of the Korean Institute of Intelligent Systems
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• v.19 no.1
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• pp.145-151
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• 2009

Orthogonal Frequency Division Multiplexing (OFDM) has been focused on as 4th generation communication method for realization of Ubiquitous Network in land mobile communications services, and has been a standard technology of Wireless Local Area Network (WLAN) for a High Date Rate communication. And in maritime data communication using high frequency (HF) band, 32-point FFT OFDM system is recommended by International Telecommunication Union (ITU). Maritime communication should be kept on connecting when maritime accident or the maritime disaster happen. Therefore, main device FFT should be operated with low power consumption. In this paper we propose a low power 32-point FFT algorithm using radix-2 and radix-4 for low power operation. The proposed algorithm was designed using VHSIC hardware description language (VHDL), and it was confirmed that the output value of Spartan-3 field-programmable gate array (FPGA) board corresponded to the output value calculated using Matlab. The proposed 32-point FFT algorithm will be useful as a leading technology in a HF maritime data communication.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.6
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• pp.1101-1105
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• 2006

Ubiquitous computing network comprises a variety of distributed service devices. Today Web services technology enables the heterogeneous devices to provide their own services and interact with each other via well-defined Internet protocol. Nevertheless, service devices in ubiquitous environments require more event-driven, autonomous interaction beyond rather passive service-oriented architecture of the present time. This paper presents an ECA (Event-Condition-Action) rule description language in an attempt to support capability for autonomous interactions among service-oriented devices in ubiquitous computing network. Specifically, the proposed WS-ECA is an XML-based ECA rule description language for web service-enabled devices. The rules are embedded in distributed devices which invoke appropriate services in the network if the rules are triggered by some internal or external events. The presented ECA-based device coordination approach is expected to facilitate seamless inter-operation among the web service-enabled devices in the emerging ubiquitous computing environment.

• ETRI Journal
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• v.33 no.5
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• pp.731-740
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• 2011

Reconfigurable computing using a field-programmable gate-array (FPGA) device has become a promising solution in system design because of its power efficiency and design flexibility. To bring the benefit of FPGA to many application programmers, there has been intensive research about automatic translation from high-level programming languages (HLL) such as C and C++ into hardware. However, the large gap of syntaxes and semantics between hardware and software programming makes the translation challenging. In this paper, we introduce a new approach for the translation by using the widely used GCC compiler. By simply adding a hardware description language (HDL) backend to the existing state-of- the-art compiler, we could minimize an effort to implement the translator while supporting full features of HLL in the HLL-to-HDL translation and providing high performance. Our translator, called GCC2Verilog, was implemented as the GCC's cross compiler targeting at FPGAs instead of microprocessor architectures. Our experiment shows that we could achieve a speedup of up to 34 times and 17 times on average with 4-port memory over PICO microprocessor execution in selected EEMBC benchmarks.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.1
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• pp.14-19
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• 2008

In order to verify a substation automation system based on IEC 61850, Korea Electric Power Research Institute under the project related to SAS has constructed IED testing system, which consists of HMI, IED(Intelligent Electronic Device), network equipment, V/I generator, and performed a various of communication tests such as the interoperability test between two IEDs made by other vendors. The test was proceeded based on SCL(Substation Configuration Description Language). This paper presents ways and procedures to simulate those tests and solutions to clear up SCL based engineering problems and compatibility among the individual manufacture tools.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.93-97
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• 2005

This paper proposes a design of stepper motor control in microstep driven mode using FPGA (Field Programmable Gate Array) for hardware implementation. The methods to drive stepper motor in microstep excitation mode are to control of the controlling currents in each phase windings of stepper motor with reference signals. These reference signals are used for controlling the current levels, the required variation of current levels with rotor position can be obtained from the ideal linear or sinusoidal approximations to the static torque-displacement ($T-{\theta}$) characteristic curve. In addition, the hardware implementation of stepper motor controller can be designed uses VHDL (Very high speed integrated circuits Hardware Description Language) and synthesis using an Altera FPGA, FLEX10K family, EPF10K20RC240-4 device as target technology and use MAX+PlusII program for overall development. A multi-stack variable-reluctance stepper motor of Sanyo Denki is used in the experiments.