• Journal of the Korea Academia-Industrial cooperation Society
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• v.17 no.7
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• pp.334-341
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• 2016

In this paper, the study of a waveguide aperture-coupled feed-structured antenna has been conducted for the purpose of applying it to a wireless back-haul system sufficient for high-capacity gigabits-per-second data rates. For this study, a $32{\times}32$ waveguide slot sub-array antenna with a corporate-feed structure was designed and produced. Also, this antenna is used at 57 GHz to 66 GHz in the V-band. The construction of the antenna is a laminated form with radiating parts (outer groove and slot, cavity), a coupled aperture, and feeds in each. The antenna was designed with HFSS, which is based on 3D-FEM, produced with aluminum processed by a precision-controlled milling machine, and assembled after a silver-plating process. The measurement result from analysis of the characteristics of the antenna shows that return loss is less than -12 dB, VSWR < 2.0, and a wide bandwidth ranges up to 16%. An overall first side lobe level is less than -12.3 dB, and a 3 dB beam width is narrow at about $1.85^{\circ}$. Also, antenna gain is 38.5 dBi, offering high efficiency exceeding 90%.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.1_2
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• pp.27-40
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• 2004

The OSGi service platform has several characteristics as in the followings. First, the service is deployed in the form of self-installable component called service bundle. Second, the service is dynamic according to its life-cycle and has interactions with other services. Third, the system resources of a home gateway are restricted. Due to these characteristics of a home gateway, there are a lot of rooms for malicious services can be Installed, and further, the nature of service can be changed. It is possible for those service bundles to influence badly on service gateways and users. However, there is no service bundle authentication mechanism considering those characteristics for the home gateway In this paper, we propose a service bundle authentication mechanism considering those characteristics for the home gateway environment. We design the mechanism for sharing a key which transports a service bundle safely in bootstrapping step that recognize and initialize equipments. And we propose the service bundle authentication mechanism based on MAC that use a shared secret created in bootstrapping step. Also we verify the safety of key sharing mechanism and service bundle authentication mechanism using a BAN Logic. This service bundle authentication mechanism Is more efficient than PKI-based service bundle authentication mechanism or RSH protocol in the service platform which has restricted resources such as storage spaces and operations.

• Journal of Advanced Navigation Technology
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• v.21 no.6
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• pp.659-665
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• 2017

In this paper, a low complexity fast Fourier transform(FFT) processor is proposed for multiple input multiple output(MIMO) systems. The IEEE 802.11ac standard has been adopted along with the demand for a system capable of high channel capacity and Gbps transmission in order to utilize various multimedia services using a wireless LAN. The proposed scalable FFT processor can support the variable length of 64, 128, 256, and 512 for 8x8 antenna configuration as specified in IEEE 802.11ac standard with MIMO-OFDM scheme. By reducing the required number of non-trivial multipliers with mixed-radix(MR) and multipath delay commutator(MDC) architecture, the complexity of the proposed FFT processor was dramatically decreased. Implementation results show that the proposed FFT processor can reduced the logic gate count by 50%, compared with the radix-2 SDF FFT processor. Also, compared with the 8-channel MR-2/2/2/4/2/4/2 MDC processor and 8-channel MR-2/2/2/8/8 MDC processor, it is shown that the gate count is reduced by 18% and 17% respectively.

• Korean Chemical Engineering Research
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• v.46 no.3
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• pp.486-491
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• 2008

This paper describes a model identification method that has been applied to a commercial 12-inch RTP (rapid thermal processing) equipment with an ultimate aim to develop a high-performance advanced controller. Seven thermocouples are attached on the wafer surface and twelve tungsten-halogen lamp groups are used to heat up the wafer. To obtain a MIMO balanced state space model, multiple SIMO (single-input multiple-output) identification with highorder ARX models have been conducted and the resulting models have been combined, transformed and reduced to a MIMO balanced state space model through a balanced truncation technique. The identification experiments were designed to minimize the wafer warpage and an output linearization block has been proposed for compensation of the nonlinearity from the radiation-dominant heat transfer. As a result from the identification at around 600, 700, and $800^{\circ}C$, respectively, it was found that $y=T(K)^2$ and the state dimension of 80-100 are most desirable. With this choice the root-mean-square value of the one-step-ahead temperature prediction error was found to be in the range of 0.125-0.135 K.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1C
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• pp.102-110
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• 2004

In this paper, we propose a VLSI structure of real-time image compression and reconstruction processor using 2-D discrete wavelet transform and implement into a hardware which use minimal hardware resource using ASIC library. In the implemented hardware, Data path part consists of the DWT kernel for the wavelet transform and inverse transform, quantizer/dequantizer, the huffman encoder/huffman decoder, the adder/buffer for the inverse wavelet transform, and the interface modules for input/output. Control part consists of the programming register, the controller which decodes the instructions and generates the control signals, and the status register for indicating the internal state into the external of circuit. According to the programming condition, the designed circuit has the various selective output formats which are wavelet coefficient, quantization coefficient or index, and Huffman code in image compression mode, and Huffman decoding result, reconstructed quantization coefficient, and reconstructed wavelet coefficient in image reconstructed mode. The programming register has 16 stages and one instruction can be used for a horizontal(or vertical) filtering in a level. Since each register automatically operated in the right order, 4-level discrete wavelet transform can be executed by a programming. We synthesized the designed circuit with synthesis library of Hynix 0.35um CMOS fabrication using the synthesis tool, Synopsys and extracted the gate-level netlist. From the netlist, timing information was extracted using Vela tool. We executed the timing simulation with the extracted netlist and timing information using NC-Verilog tool. Also PNR and layout process was executed using Apollo tool. The Implemented hardware has about 50,000 gate sizes and stably operates in 80MHz clock frequency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.4
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• pp.1-9
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• 2009

In this paper, a small area 12-bit 300MSPS CMOS Digital-to-Analog Converter(DAC) is proposed for display systems. The architecture of the DAC is based on a current steering 6+6 segmented type, which reduces non-linearity error and other secondary effects. In order to improve the linearity and glitch noise, an analog current cell using monitoring bias circuit is designed. For the purpose of reducing chip area and power dissipation, furthermore, a noble self-clocked switching logic is proposed. To verify the performance, it is fabricated with $0.13{\mu}m$ thick-gate 1-poly 6-metal N-well Samsung CMOS technology. The effective chip area is $0.26mm^2$ ($510{\mu}m{\times}510{\mu}m$) with 100mW power consumption. The measured INL (Integrated Non Linearity) and DNL (Differential Non Linearity) are within ${\pm}3LSB$ and ${\pm}1LSB$, respectively. The measured SFDR is about 70dB, when the input frequency is 15MHz at 300MHz clock frequency.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.93-100
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• 2009

This paper presents a step up four channel DC-DC converter using charge pump voltage doubler structure. Our goal is to design and implement DC-DC converter for capacitive SP4T RF MEMS switch in front end module in wireless transceiver system. Charge pump structure is small and consume low power 3.3V input voltage is boosted by DC-DC Converter to $11.3{\pm}0.1V$, $12.4{\pm}0.1V$, $14.1{\pm}0.2V$ output voltage With 10MHz switching frequency. By using voltage level shifter structure, output of DC-DC converter is selected by 3.3V four channel selection signals and transferred to capacitive MEMS devices. External passive devices are not used for driving DC-DC converter. The total chip area is $2.8{\times}2.1mm^2$ including pads and the power consumption is 7.52mW, 7.82mW, 8.61mW.

• The Journal of Korean Academy of Prosthodontics
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• v.56 no.2
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• pp.173-178
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• 2018

The direct metal laser sintering (DMLS) technique would be promising for the full-arch implant-supported restorations due to reduced cost and manufacturing time without potential human errors and casting defects. The aims of this case report were to describe the successful outcome of an implant-supported fixed dental prosthesis in the edentulous maxilla by using the DMLS technology and computer-aided design and computer-aided manufacturing (CAD/CAM) monolithic zirconia crowns, and to describe its clinical implications. A healthy 51-year-old Korean woman visited Seoul National University Dental Hospital and she was in need of a rehabilitation of her entire maxilla due to severe tooth mobility. In this case, all maxillary teeth were extracted and an implant-supported fixed dental prosthesis was fabricated that involved a cobalt-chromium (Co-Cr) framework with the DMLS technique and CAD/CAM monolithic zirconia crowns. Six months after delivery, no distinct mechanical and biological complications were detected and the prosthesis exhibited satisfactory esthetics and function. In this case report, with the DMLS system, the three-dimensional printed prosthesis was created without additional manual tooling and thus, reliable accuracy and passive fit were obtained.

• Proceedings of the Korean Association of Geographic Inforamtion Studies Conference
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• 2003.04a
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• pp.247-255
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• 2003

80년대 초 GIS의 개념이 국내에 도입된 후, 1988년 대구광역시를 필두로 지자체의 GIS 구축이 시작되어 국가에서는 GIS 구축의 체계적인 관리의 필요성에 따라 1995년 제1차 국가GIS 기본계획을 수립하고, 2000년 ‘국가지리정보체계의 구축 및 활용 등에 관한 법률’을 제정, 공포하여 각 지자체의 실정에 맞는 GIS 기본계획을 수립하도록 유도하고 있다. 그러나, 바람직한 지자체 GIS 기본계획 작성의 표준이 제시되지 않아 지자체 GIS 기본계획이 개인의 안목이나 타 지자체의 내용을 참조로 만들어져 형식적이고 획일적인 결과물이 산출되고 있다. 그리하여 기존에 수립된 지자체 GIS 기본계획이 일부의 지자체를 제외하고는 해당 지자체의 GIS 구축 사업에 활용되지 못하고 책장속의 책으로 존재하고 있다. 따라서, 본 논문의 목적은 지자체 GIS 기본계획 표준안을 제시하여 향후 해당 지자체에서 GIS 기본계획을 수립할 때, 구성적인 측면의 틀을 제공하여 일정수준을 만족할 수 있는 지자체 GIS 기본계획의 수립을 지원하고자 한다. 지자체 GIS 기본계획 표준(안)을 도출하기 위해서 정보화전략계획과 해외 관련 연구, 국가GIS 기본계획의 검토를 통하여 지자체 GIS 기본계획의 구성요소를 도출하고, 기존지자체 GIS 기본계획의 목차를 중심으로 분석하여, 문제점을 도출하고, 그에 따른 시사점을 제시하여 지자체 GIS 기본계획 표준(안)의 기반이 되도록 하였다. 제안된 지자체 GIS 기본계획 표준(안)은 향후 각 지자체의 활용가치가 높은 GIS 기본 계획의 수립에 도움이 될 수 있도록 하며, 나아가서는 수립된 지자체 GIS 기본계획이 지자체의 성공적인 GIS 구축을 유도하는 가이드의 역할을 수행할 것으로 기대된다.가 있다. 본 연구의 결과를 통해 지방자치단체 GIS 기본계획에 있어 조직 측면의 장기적 비전의 제시가 가능하며 이를 통해 보다 성숙된 GIS 사업의 추진과 효율적인 시스템의 운영이 가능할 것이다.. 이상의 결과를 종합해볼 때, ${\beta}$-glucan은 고용량일 때 직접적으로 또는 $IFN-{\gamma}$ 존재시에는 저용량에서도 복강 큰 포식세로를 활성화시킬 뿐 아니라, 탐식효율도 높임으로써 면역기능을 증진 시키는 것으로 나타났고, 그 효과는 crude ${\beta}$-glucan의 추출조건에 따라 달라지는 것을 알 수 있었다.eveloped. Design concepts and control methods of a new crane will be introduced in this paper.and momentum balance was applied to the fluid field of bundle. while the movement of′ individual material was taken into account. The constitutive model relating the surface force and the deformation of bundle was introduced by considering a representative prodedure that stands for the bundle movement. Then a fundamental equations system could be simplified considering a steady state of the process. On the basis of the simplifie

• Proceedings of the Korean Association of Geographic Inforamtion Studies Conference
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• 2003.04a
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• pp.239-246
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• 2003

BPR(Business Process Re-engineering)은 업무 프로세스를 혁신적으로 재설계 함으로써 급속한 외부환경과 내부환경의 변화에 능동적으로 대처하고자 하는 기업의 경영혁신 기법, 조직 재설계의 수단으로 도입되었다. 해마다 시행되고 있는 정보화평가위원회의 국가 정보화 사업에 대한 평가는 정보화 사업의 성과관리에 있어 BPR에 따른 조직과 제도개선 성과를 포함하여 제도혁신에 대한 인센티브 제공 둥 조직과 제도혁신 강화의 필요성이 강하게 주장되는 등 BPR은 공공부문으로 점차 확대 될 추세이다. 본 연구는 조직적 문제의 해결을 통하여 지방자치단체 GIS의 효율성을 제고 하고자 하는 목적으로 출발하였다. 따라서 BPR의 이론적 고찰을 통하여 지자체 GIS BPR의 개념을 정의하고, 지방자치단체의 GIS 시스템 도입 이후의 업무 프로세스의 변화, 업무 변화의 양상, 잠재적 업무 효과를 BPR의 기법을 통해 보여줌으로써 조직 재설계의 수단으로 GIS BPR의 가능성을 모색하였다. 이는 GIS 발달 단계에 따른 효과 창출의 패러다임을 고려한 지방자치단체 GIS 업무의 변화를 수용하는 능동적이고 융통성 있는 조직 모형을 찾는 것이라 할 수 있다. 따라서 단위조직, 진화조직, 전체조직의 GIS 발달 단계에 따른 지방자치단체 GIS 조직 모형을 규정하였다. 본 연구를 통한 시사점은 지방자치단체 GIS 조직이 현재의 단위조직 수준에서 진화조직의 단계를 걸쳐 전체조직으로 향하는 가능성을 제시했다는 점이다. 이는 지방자치단체가 각각의 단계에서 GIS의 도입 효과를 창출하기 위하여 충실히 수행해 할 것이 무엇인지를 BPR을 통해 조직적 차원에서, 그리고 조직이 다루는 업무영역의 차원에서 접근했다는 점에서 그 의의가 있다. 본 연구의 결과를 통해 지방자치단체 GIS 기본계획에 있어 조직 측면의 장기적 비전의 제시가 가능하며 이를 통해 보다 성숙된 GIS 사업의 추진과 효율적인 시스템의 운영이 가능할 것이다.. 이상의 결과를 종합해볼 때, ${\beta}$-glucan은 고용량일 때 직접적으로 또는 $IFN-{\gamma}$ 존재시에는 저용량에서도 복강 큰 포식세로를 활성화시킬 뿐 아니라, 탐식효율도 높임으로써 면역기능을 증진 시키는 것으로 나타났고, 그 효과는 crude ${\beta}$-glucan의 추출조건에 따라 달라지는 것을 알 수 있었다.eveloped. Design concepts and control methods of a new crane will be introduced in this paper.and momentum balance was applied to the fluid field of bundle. while the movement of′ individual material was taken into account. The constitutive model relating the surface force and the deformation of bundle was introduced by considering a representative prodedure that stands for the bundle movement. Then a fundamental equations system could be simplified considering a steady state of the process. On the basis of the simplified model, the simulation was performed and the results could be confirmed by the experiments under various conditions.뢰, 결속 등 다차원의 개념에 대한 심도 깊은 연구와 최근 제기되고 있는 이론의 확대도 필요하다. 마지막으로 신뢰와 결속에 영향을 미치는 요소간의 개념적 분류, 차이의 검증, 영향력 등