• Title/Summary/Keyword: Design of Information Systems

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Design and Optimization of Mu1ti-codec Video Decoder using ASIP (ASIP를 이용한 다중 비디오 복호화기 설계 및 최적화)

  • Ahn, Yong-Jo;Kang, Dae-Beom;Jo, Hyun-Ho;Ji, Bong-Il;Sim, Dong-Gyu;Eum, Nak-Woong
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.48 no.1
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    • pp.116-126
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    • 2011
  • In this paper, we present a multi-media processor which can decode multiple-format video standards. The designed processor is evaluated with optimized MPEG-2, MPEG-4, and AVS (Audio video standard). There are two approaches for developing of real-time video decoders. First, hardware-based system is much superior to a processor-based one in execution time. However, it takes long time to implement and modify hardware systems. On the contrary, the software-based video codecs can be easily implemented and flexible, however, their performance is not so good for real-time applications. In this paper, in order to exploit benefits related to two approaches, we designed a processor called ASIP(Application specific instruction-set processor) for video decoding. In our work, we extracted eight common modules from various video decoders, and added several multimedia instructions to the processor. The developed processor for video decoders is evaluated with the Synopsys platform simulator and a FPGA board. In our experiment, we can achieve about 37% time saving in total decoding time.

Performance Improvement of Word Clustering Using Ontology (온톨로지를 이용한 단어 군집화 성능 개선)

  • Park Eun-Jin;Kim Jae-Hoon;Ock Cheol-Young
    • The KIPS Transactions:PartB
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    • v.13B no.3 s.106
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    • pp.337-344
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    • 2006
  • In this paper, we describe the design and the implementation of word clustering system using a definition of an entry word in the dictionary, called a dictionary definition. Generally word clustering needs various features like words and the performance of a system for the word clustering depends on using some kinds of features. Dictionary definition describes the meaning of an entry in detail, but words in the dictionary definition are implicative or abstractive, and then its length is not long. The word clustering using only features extracted from the dictionary definition results in a lots of small-size clusters. In order to make large-size clusters and improve the performance, we need to transform the features into more general words with keeping the original meaning of the dictionary definition as intact as possible. In this paper, we propose two methods for extending the dictionary definition using ontology. One is to extend the dictionary definition to parent words on the ontology and the other is to extend the dictionary definition to some words in fixed depth from the root of the ontology. Through our experiments, we have observed that the proposed systems outperform that without extending features, and the latter's extending method overtakes the former's extending method in performance. We have also observed that verbs are very useful in extending features in the case of word clustering.

Design of Low Voltage 1.8V, Wide Range 50∼500MHz Delay Locked Loop for DDR SDRAM (DDR SDRAM을 위한 저전압 1.8V 광대역 50∼500MHz Delay Locked Loop의 설계)

  • Koo, In-Jae;Chung, Kang-Min
    • The KIPS Transactions:PartA
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    • v.10A no.3
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    • pp.247-254
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    • 2003
  • This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.

Defining an Architectural Pattern for the Software Based Simulators in Consideration of Modifiability and Interoperability (변경가능성과 상호운영성을 고려한 소프트웨어 기반 시뮬레이터 아키텍처 패턴의 정의)

  • Kuk, Seung-Hak;Kim, Hyeon-Soo;Lee, Sang-Uk
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.8
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    • pp.547-565
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    • 2009
  • Simulation is the imitation of some real thing, state of affairs, or process. The act of simulating something generally entails identifying certain key characteristics or behaviors of a selected physical or abstract system. And a simulator is the software or hardware tool that performs simulation tasks. When developing a simulator, the non-functional requirements such as modifiability, interoperability, and extendability should be required. However, existing studies about the simulator development focus not on such non-functional requirements but on the methodologies to build the simulation model. In this paper, we suggest the new architectural pattern for the software based simulator in consideration of such non-functional requirements. In order to define the architectural pattern, we identify the essential elements of the simulators, define relationships between them, and design the architectural structure with the elements to accommodate such non-functional requirements. According to the proposed pattern we can solve the simulation problems to combine the various simulation model components. The pattern guarantees modifiability by reconstructing the simulation model, also guarantees interoperability and extendability by adding various interfaces to the simulation model and by keeping the consistent interfacing mechanism between the simulation model components. The suggested architectural pattern can be used as the reference architecture of the simulator systems that will be developed in future.

A Study on the Design and Implementation of a Thermal Imaging Temperature Screening System for Monitoring the Risk of Infectious Diseases in Enclosed Indoor Spaces (밀폐공간 내 감염병 위험도 모니터링을 위한 열화상 온도 스크리닝 시스템 설계 및 구현에 대한 연구)

  • Jae-Young, Jung;You-Jin, Kim
    • KIPS Transactions on Computer and Communication Systems
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    • v.12 no.2
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    • pp.85-92
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    • 2023
  • Respiratory infections such as COVID-19 mainly occur within enclosed spaces. The presence or absence of abnormal symptoms of respiratory infectious diseases is judged through initial symptoms such as fever, cough, sneezing and difficulty breathing, and constant monitoring of these early symptoms is required. In this paper, image matching correction was performed for the RGB camera module and the thermal imaging camera module, and the temperature of the thermal imaging camera module for the measurement environment was calibrated using a blackbody. To detection the target recommended by the standard, a deep learning-based object recognition algorithm and the inner canthus recognition model were developed, and the model accuracy was derived by applying a dataset of 100 experimenters. Also, the error according to the measured distance was corrected through the object distance measurement using the Lidar module and the linear regression correction module. To measure the performance of the proposed model, an experimental environment consisting of a motor stage, an infrared thermography temperature screening system and a blackbody was established, and the error accuracy within 0.28℃ was shown as a result of temperature measurement according to a variable distance between 1m and 3.5 m.

Vulnerability Analysis for Industrial Control System Cyber Security (산업제어시스템의 사이버보안을 위한 취약점 분석)

  • Kim, Do-Yeon
    • The Journal of the Korea institute of electronic communication sciences
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    • v.9 no.1
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    • pp.137-142
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    • 2014
  • Industrial control system (ICS) is a computer based system which are typically used in nation-wide critical infra-structure facilities such as electrical, gas, water, wastewater, oil and transportation. In addition, ICS is essentially used in industrial application domain to effectively monitor and control the remotely scattered systems. The highly developed information technology (IT) and related network techniques are continually adapted into domains of industrial control system. However, industrial control system is confronted significant side-effects, which ICS is exposed to prevalent cyber threats typically found in IT environments. Therefore, cyber security vulnerabilities and possibilities of cyber incidents are dramatically increased in industrial control system. The vulnerabilities that may be found in typical ICS are grouped into Policy and Procedure, Platform, and Network categories to assist in determining optimal mitigation strategies. The order of these vulnerabilities does not necessarily reflect any priority in terms of likelihood of occurrence or severity of impact. Firstly, corporate security policy can reduce vulnerabilities by mandating conduct such as password usage and maintenance or requirements for connecting modems to ICS. Secondly, platfom vulnerabilities can be mitigated through various security controls, such as OS and application patching, physical access control, and security software. Thirdly, network vulnerabilities can be eliminated or mitigated through various security controls, such as defense-in-depth network design, encrypting network communication, restricting network traffic flows, and providing physical access control for network components.

Color Image Segmentation and Textile Texture Mapping of 2D Virtual Wearing System (2D 가상 착의 시스템의 컬러 영상 분할 및 직물 텍스쳐 매핑)

  • Lee, Eun-Hwan;Kwak, No-Yoon
    • Journal of KIISE:Computer Systems and Theory
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    • v.35 no.5
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    • pp.213-222
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    • 2008
  • This paper is related to color image segmentation and textile texture mapping for the 2D virtual wearing system. The proposed system is characterized as virtually wearing a new textile pattern selected by user to the clothing shape section, based on its intensity difference map, segmented from a 2D clothes model image using color image segmentation technique. Regardless of color or intensity of model clothes, the proposed system is possible to virtually change the textile pattern or color with holding the illumination and shading properties of the selected clothing shape section, and also to quickly and easily simulate, compare, and select multiple textile pattern combinations for individual styles or entire outfits. The proposed system can provide higher practicality and easy-to-use interface, as it makes real-time processing possible in various digital environment, and creates comparatively natural and realistic virtual wearing styles, and also makes semi-automatic processing possible to reduce the manual works to a minimum. According to the proposed system, it can motivate the creative activity of the designers with simulation results on the effect of textile pattern design on the appearance of clothes without manufacturing physical clothes and, as it can help the purchasers for decision-making with them, promote B2B or B2C e-commerce.

Design and Implementation of a Hardware-based Transmission/Reception Accelerator for a Hybrid TCP/IP Offload Engine (하이브리드 TCP/IP Offload Engine을 위한 하드웨어 기반 송수신 가속기의 설계 및 구현)

  • Jang, Han-Kook;Chung, Sang-Hwa;Yoo, Dae-Hyun
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.9
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    • pp.459-466
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    • 2007
  • TCP/IP processing imposes a heavy load on the host CPU when it is processed by the host CPU on a very high-speed network. Recently the TCP/IP Offload Engine (TOE), which processes TCP/IP on a network adapter instead of the host CPU, has become an attractive solution to reduce the load in the host CPU. There have been two approaches to implement TOE. One is the software TOE in which TCP/IP is processed by an embedded processor and the other is the hardware TOE in which TCP/IP is processed by a dedicated ASIC. The software TOE has poor performance and the hardware TOE is neither flexible nor expandable enough to add new features. In this paper we designed and implemented a hybrid TOE architecture, in which TCP/IP is processed by cooperation of hardware and software, based on an FPGA that has two embedded processor cores. The hybrid TOE can have high performance by processing time-critical operations such as making and processing data packets in hardware. The software based on the embedded Linux performs operations that are not time-critical such as connection establishment, flow control and congestions, thus the hybrid TOE can have enough flexibility and expandability. To improve the performance of the hybrid TOE, we developed a hardware-based transmission/reception accelerator that processes important operations such as creating data packets. In the experiments the hybrid TOE shows the minimum latency of about $19{\mu}s$. The CPU utilization of the hybrid TOE is below 6 % and the maximum bandwidth of the hybrid TOE is about 675 Mbps.

Verification and Implementation of a Service Bundle Authentication Mechanism in the OSGi Service Platform Environment (OSGi 서비스 플랫폼 환경에서 서비스 번들 인증 메커니즘의 검증 및 구현)

  • 김영갑;문창주;박대하;백두권
    • Journal of KIISE:Computer Systems and Theory
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    • v.31 no.1_2
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    • pp.27-40
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    • 2004
  • The OSGi service platform has several characteristics as in the followings. First, the service is deployed in the form of self-installable component called service bundle. Second, the service is dynamic according to its life-cycle and has interactions with other services. Third, the system resources of a home gateway are restricted. Due to these characteristics of a home gateway, there are a lot of rooms for malicious services can be Installed, and further, the nature of service can be changed. It is possible for those service bundles to influence badly on service gateways and users. However, there is no service bundle authentication mechanism considering those characteristics for the home gateway In this paper, we propose a service bundle authentication mechanism considering those characteristics for the home gateway environment. We design the mechanism for sharing a key which transports a service bundle safely in bootstrapping step that recognize and initialize equipments. And we propose the service bundle authentication mechanism based on MAC that use a shared secret created in bootstrapping step. Also we verify the safety of key sharing mechanism and service bundle authentication mechanism using a BAN Logic. This service bundle authentication mechanism Is more efficient than PKI-based service bundle authentication mechanism or RSH protocol in the service platform which has restricted resources such as storage spaces and operations.

Design and Implementation of Multiple Filter Distributed Deduplication System Applying Cuckoo Filter Similarity (쿠쿠 필터 유사도를 적용한 다중 필터 분산 중복 제거 시스템 설계 및 구현)

  • Kim, Yeong-A;Kim, Gea-Hee;Kim, Hyun-Ju;Kim, Chang-Geun
    • Journal of Convergence for Information Technology
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    • v.10 no.10
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    • pp.1-8
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    • 2020
  • The need for storage, management, and retrieval techniques for alternative data has emerged as technologies based on data generated from business activities conducted by enterprises have emerged as the key to business success in recent years. Existing big data platform systems must load a large amount of data generated in real time without delay to process unstructured data, which is an alternative data, and efficiently manage storage space by utilizing a deduplication system of different storages when redundant data occurs. In this paper, we propose a multi-layer distributed data deduplication process system using the similarity of the Cuckoo hashing filter technique considering the characteristics of big data. Similarity between virtual machines is applied as Cuckoo hash, individual storage nodes can improve performance with deduplication efficiency, and multi-layer Cuckoo filter is applied to reduce processing time. Experimental results show that the proposed method shortens the processing time by 8.9% and increases the deduplication rate by 10.3%.