• Title/Summary/Keyword: Design complexity

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Flow Analyses in a Cross-Flow Fan (횡류팬 내부의 유동해석)

  • Lee H G.;Park H. K.
    • 한국전산유체공학회:학술대회논문집
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    • 2002.05a
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    • pp.65-70
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    • 2002
  • Cross-Flow Fan(CFF) are widely used lot industrial equipments and household electric appliances. A design method for CFFs, however, has not been well established because of the complexity of the internal flow. Numerical analysis was performed by using STAR-CD. In this study present the internal flow of CFF, which has varies pin number, and their flowrate were compared

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A Multivariable Fuzzy Control System with a Coorinator

  • Lee, Pyeong-Gi-;Jeon, Gi-Joon
    • Proceedings of the Korean Institute of Intelligent Systems Conference
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    • 1993.06a
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    • pp.1141-1144
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    • 1993
  • For the design of multivariable fuzzy control systems the decomposition of control rules is preferable since it alleviates the complexity of the problem. In some systems, however, inference error of the Gupta's decomposition method is inevitable because of its approximate nature. In this paper, we propose a new multivariable fuzzy controller with a coordinator which can reduce the inference error of the decomposition method by using an index of applicability.

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Design Consideration of Spacecraft Switched Shunt Power System (스위칭 방식을 갖는 인공위성 전압 분류 조절기 디자인 고려)

  • Choi, Jae-Dong;Ma, Keun-Su;Nam, Moon-Gyung
    • Proceedings of the KIEE Conference
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    • 1996.11a
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    • pp.320-322
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    • 1996
  • In this paper, solar array switching regulation is proposed as a replacement for conventional regulation techniques to reduce weight, thermal dissipation, and power system complexity for large power spacecraft. Each component model is developed which is used to explain the interaction of the solar array switching regulation and constant power type load, solar array.

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Functional Safety Processor for Electronics of Autonomous Cars (자율주행자동차 전장시스템을 위한 기능안전 프로세서 기술)

  • Han, J.H.;Kwon, Y.S.;Kang, S.W.
    • Electronics and Telecommunications Trends
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    • v.34 no.1
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    • pp.123-131
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    • 2019
  • Automotive electronics are complex and require high performance with an advanced driver assistant system (ADAS) and a functioning autonomous system. Thus, considering their complexity, the processor of the electronic control unit (ECU) requires a design that ensures high performance and reliability to ensure functional safety. This study discusses the technology used for developing a processor that can ensure functional safety of current automotive electronic systems.

QFT Tunning of Multivariable Mu Controllers

  • Lee, J.W.;Y. Chait;M. Steinbuch
    • 제어로봇시스템학회:학술대회논문집
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    • 1998.10a
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    • pp.157-160
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    • 1998
  • We argue that the combination of optimal control synthesis and QFT tuning enables design of controllers with levels of performance that surpasses what can be achieved using only a single technique. Using a constructive example, we demonstrate how the strength of each technique is utilized to arrive at a particularly desired controller in terms of tradeoffs between performance and controller complexity.

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Scheme for Reducing HEVC Intra Coding Complexity Considering Video Resolution and Quantization Parameter (비디오 해상도 및 양자화 파라미터를 고려한 HEVC의 화면내 부호화 복잡도 감소 기법)

  • Lee, Hong-Rae;Seo, Kwang-Deok
    • Journal of Broadcast Engineering
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    • v.19 no.6
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    • pp.836-846
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    • 2014
  • To expedite UHD (Ultra High Definition) video service, the HEVC (High-Efficiency Video Coding) technology has recently been standardized and it achieves two times higher compression efficiency than the conventional H.264/AVC. To obtain the improved efficiency, however, it employs many complex methods which need complicated calculation, thereby resulting in a significantly increased computational complexity when compared to that of H.264/AVC. For example, to improve the coding efficiency of intra frame coding, up to 35 intra prediction modes are defined in HEVC, but this results in an increased encoding time than the H.264/AVC. In this paper, we propose a fast intra prediction mode decision scheme which reduces computational complexity by changing the number of intra prediction mode in accordance with the percentage of PU sizes for a given video resolution, and by classifying the 35 intra prediction modes into 4 categories considering video resolution and quantization parameter. The experimental results show that the total encoding time is reduced by about 7% on average at the cost of only 2% increase in BD-rate.

A Case Study on Improving SW Quality through Software Visualization (소프트웨어 가시화를 통한 품질 개선 사례 연구)

  • Park, Bo Kyung;Kwon, Ha Eun;Son, Hyun Seung;Kim, Young Soo;Lee, Sang-Eun;Kim, R. Young Chul
    • Journal of KIISE
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    • v.41 no.11
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    • pp.935-942
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    • 2014
  • Today, it is very important issue to high quality of software issue on huge scale of code and time-to-market. In the industrial fields still developers focuses on Code based development. Therefore we try to consider two points of views 1) improving the general developer the bad development habit, and 2) maintenance without design, documentation and code visualization. To solve these problems, we need to make the code visualization of code. In this paper, we suggest how to visualize the inner structure of code, and also how to proceed improvement of quality with constructing the Tool-Chain for visualizing Java code's inner structure. For our practical case, we applied Object Code with NIPA's SW Visualization, and then reduced code complexity through quantitatively analyzing and visualizing code based on setting the basic module unit, the class of object oriented code.

Utility Design for Graceful Degradation in Embedded Systems (우아한 성능감퇴를 위한 임베디드 시스템의 유용도 설계)

  • Kang, Min-Koo;Park, Kie-Jin
    • Journal of KIISE:Computer Systems and Theory
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    • v.34 no.2
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    • pp.65-72
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    • 2007
  • As embedded system has strict cost and space constraints, it is impossible to apply conventional fault-tolerant techniques directly for increasing the dependability of embedded system. In this paper, we propose software fault-tolerant mechanism which requires only minimum redundancy of system component. We define an utility metric that reflects the dependability of each embedded system component, and then measure the defined utility of each reconfiguration combinations to provide fault tolerance. The proposed utility evaluation process shows exponential complexity. However we reduce the complexity by hierachical subgrouping at the software level of each component. When some components of embedded system are tailed, reconfiguration operation changes the system state from current faulty state to pre-calculated one which has maximum utility combination.

Moment-based Fast CU Size Decision Algorithm for HEVC Intra Coding (HEVC 인트라 코딩을 위한 모멘트 기반 고속 CU크기 결정 방법)

  • Kim, Yu-Seon;Lee, Si-Woong
    • The Journal of the Korea Contents Association
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    • v.16 no.10
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    • pp.514-521
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    • 2016
  • The High Efficiency Video Coding (HEVC) standard provides superior coding efficiency by utilizing highly flexible block structure and more diverse coding modes. However, rate-distortion optimization (RDO) process for the decision of optimal block size and prediction mode requires excessive computational complexity. To alleviate the computation load, this paper proposes a new moment-based fast CU size decision algorithm for intra coding in HEVC. In the proposed method, moment values are computed in each CU block to estimate the texture complexity of the block from which the decision on an additional CU splitting procedure is performed. Unlike conventional methods which are mostly variance-based approaches, the proposed method incorporates the third-order moments of the CU block in the design of the fast CU size decision algorithm, which enables an elaborate classification of CU types and thus improves the RD-performance of the fast algorithm. Experimental results show that the proposed method saves 32% encoding time with 1.1% increase of BD-rate compared to HM-10.0, and 4.2% decrease of BD-rate compared to the conventional variance-based fast algorithm.

Low-complexity Timing Synchronization System for IEEE802.11a Wireless LANs (IEEE802.11a 무선 랜 적용을 위한 시간동기 시스템 제안)

  • 하태현;이성주;김재석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.11B
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    • pp.965-971
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    • 2003
  • This paper suggests a low-complexity frame timing synchronization system for IEEE802.11a wireless LAN systems. The proposed timing synchronization scheme has been implemented by correlating the received OFDM preamble with quantized coefficients composed of {0, ${\pm}$2$^{0}$ , ${\pm}$2$^1$‥‥‥ ${\pm}$2$^{i}$ ), where i is an integer number. The 2$^{i}$ -valued coefficients enable the multipliers in the correlation system to be simplified to i-bit shifters. So we can design the correlation system using shifters instead of multipliers. We estimate the performance of the proposed scheme in comparison with conventional systems under the AWGN and Rayleigh fading channels. In this paper we show that the complexity can be reduced by 90% while still maintaining a performance comparable to that of the conventional system.