• The Transactions of The Korean Institute of Electrical Engineers
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• v.58 no.9
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• pp.1802-1808
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• 2009

A fault detection observer with finite time convergence characteristics(FT_FDO) is proposed and applied to a fault detection isolation system for a dynamic control system. The FT_FDO is a kind of dual state-observer scheme that provides with the state estimates insensitive to a specified fault and the corresponding fault estimate. The state estimates are processed to get the residual that will be logically compared with other residuals to detect and isolate the fault of interest, and the fault estimate may be used for fault compensation. The FDIS employing the FT_FDOs can be considered to be a multiple observer schemes(MOS) in which FT_FDOs are parallelly driven to generate a set of residuals to be compared each other. Due to the finite time convergence characteristics of the FT_FDO, the predetermined detection delay can be considered in the design stage of FDIS so that any fault of interest can be detected and identified in that time. It evidently resolves a well known difficulty of threshold selection owing to the transient responses of the fault detection observers(FDO) employed in FDIS. An FDIS is constructed for instruments(2-sensor, 1-actuator) in an inverted pendulum control system, and simulations are performed to show the performance of the FDIS and fault tolerant control system.

• Journal of the Korean Applied Science and Technology
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• v.19 no.2
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• pp.131-136
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• 2002

As model waterborne acrylic coatings, mono-dispersed poly(butyl acrylate-methyl methacrylate) copolymer latexes of random copolymer and core/shell type graft copolymer were prepared by seeded multi-staged emulsion polymerization with particle size of $180{\sim}200$ nm using semi-batch type process. Sodium lauryl sulfate and potassium persulfate were used as an emulsifier and an initiator, respectively. The effect of particle texture including core/shell phase ratio, glass transition temperature and crosslinking density, and film forming temperature on the film formation and final properties of film was investigated using SEM, AFM, and UV in this study. The film formation behavior of model latex was traced simultaneously by the weight loss measurement and by the change of tensile properties and UV transmittance during the entire course of film formation. It was found that the increased glass transition temperature and higher crosslinking degree of latex resulted in the delay of the onset of coalescence of particles by interdiffusion during film forming process. This can be explained qualitatively in terms of diffusion rate of polymer chains. However, the change of weight loss during film formation was insensitive to discern each film forming stages-I, II and III.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.7
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• pp.1128-1138
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• 2000

This paper presents two different approaches for channel estimation of IMT-2000 pilot symbol-assisted W-CDMA reverse link over Rayleigh fading channels of one and two paths. By obtaining BER performance through computer simulations, the proposed algorithms of 2-point second-order interpolation and IDD BWMA are compared with the performance of existing interpolation and adaptive algorithms. The BER performance of the proposed algorithms is superior to WMSA, linear and second-order Gaussian interpolation, LMS, and RLS algorithm in fast fading channels. In particular, the BER performance of the IDD BWMA algorithm is nearly insensitive for Doppler frequency within simulation range $E_b/N_0$ = 28 dB. The two proposed algorithms also have relatively simple structure and similar processing delay in comparison to the existing algorithms. Therefore, these algorithms are more suitable for high-speed mobile communication environments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.3
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• pp.239-246
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• 2014

In the context of wireless sensor networks, one of major issues is energy conservation. For low power communication, by utilizing our experimental results for the relation between clock drift and synchronization interval, we designed a new protocol which can support a wide range of duty cycles for applications with very low traffic rate and insensitive delay. The transmission (TX) node in the protocol synchronizes with the reception (RX) node very before transmitting a packet, and it can adaptively estimate the synchronization error size according to the synchronization interval from minutes to hours. We conducted simulations and a testbed implementation to show the efficacy of the proposed protocol. We found that our protocol substantially outperforms other state-of-the-art protocols, resulting in order-of-magnitude increase in network lifetime over a variety of duty cycles.

• The KIPS Transactions:PartC
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• v.15C no.1
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• pp.31-36
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• 2008

The clock frequency difference of sensor nodes is one of main parameters in TOF estimation and affect to degrade ranging algorithms to estimate positions of mobile nodes in wireless sensor networks. The specification of IEEE802.15.4a describes asynchronous TWR and SDS-TWR insensitive to frequency difference without any additional network synchronization. But the TWR and SDS-TWR can not eliminate sufficiently the effect of frequency difference of node pair, packet processing delay and its difference. Especially use of low cost oscillator with wide range offset, sensor node with different hardware and software can make the positioning errors worse. We propose an estimation method of frequency differences, and apply the measured frequency differences to TWR and SDS-TWR. We evaluate the performance of the proposed algorithm with simulation, and make certain that the proposed method enhances the performance of existing algorithms with positioning errors less than 25 cm.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.7
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• pp.17-26
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• 2016

This work proposes a 12b 60MS/s 0.18um CMOS Flash-SAR ADC for various systems such as wireless communications and portable video processing systems. The proposed Flash-SAR ADC alleviates the weakness of a conventional SAR ADC that the operation speed proportionally increases with a resolution by deciding upper 4bits first with a high-speed flash ADC before deciding lower 9bits with a low-power SAR ADC. The proposed ADC removes a sampling-time mismatch by using the C-R DAC in the SAR ADC as the combined sampling network instead of a T/H circuit which restricts a high speed operation. An interpolation technique implemented in the flash ADC halves the required number of pre-amplifiers, while a switched-bias power reduction scheme minimizes the power consumption of the flash ADC during the SAR operation. The TSPC based D-flip flop in the SAR logic for high-speed operation reduces the propagation delay by 55% and the required number of transistors by half compared to the conventional static D-flip flop. The prototype ADC in a 0.18um CMOS demonstrates a measured DNL and INL within 1.33LSB and 1.90LSB, with a maximum SNDR and SFDR of 58.27dB and 69.29dB at 60MS/s, respectively. The ADC occupies an active die area of $0.54mm^2$ and consumes 5.4mW at a 1.8V supply.

• Journal of IKEEE
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• v.23 no.1
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• pp.280-288
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• 2019

In the CR-enabled MANET, routing paths can be easily destroyed due to node mobility and channel unavailability (due to the emergence of the PU of a channel), resulting in significant overhead to maintain/recover the routing path. In this paper, network caching is actively used for route maintenance, taking into account the properties of the CR. In the proposed scheme, even if a node detects that a path becomes unavailable, it does not generate control messages to establish an alternative path. Instead, the node stores the packets in its local cache and 1) waits for a certain amount of time for the PU to disappear; 2) waits for a little longer while overhearing messages from other flow; 3) after that, the node applies local route recovery process or delay tolerant forwarding strategy. According to the simulation study using the OPNET simulator, it is shown that the proposed scheme successfully reduces the amount of control messages for path recovery and the service latency for the time-sensitive traffic by 13.8% and 45.4%, respectively, compared to the existing scheme. Nevertheless, the delivery ratio of the time-insensitive traffic is improved 14.5% in the proposed scheme.