• Journal of Power Electronics
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• v.15 no.2
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• pp.504-517
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• 2015

This paper presents a novel switching voltage model and an offset-based pulse width modulation (PWM) scheme for multilevel inverters with unbalanced DC sources. The switching voltage model under a DC voltage imbalance will be formulated in general form for multilevel neutral-point-clamped topologies. Analysis of the reference switching voltages from active and non-active switching voltage components in abc coordinates can enable voltage implementation for an unbalanced DC-source condition. Offset voltage is introduced as an indispensable variable in the switching voltage model for multilevel voltage-source inverters. The PWM performance is controlled through the design of two offset components in a subsequence. One main offset may refer to the common mode voltage, and the other offset restricts its effect on the quality of PWM control in related DC levels. The PWM quality can be improved as the switching loss is reduced in a discontinuous PWM mode by setting the local offset, which is related to the load currents. The validity of the proposed algorithm is verified by experimental results.

• ETRI Journal
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• v.27 no.5
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• pp.473-483
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• 2005

In this paper, we propose two LC voltage-controlled oscillators (VCOs) that improve both phase noise and tuning range. With both 1/f induced low-frequency noise and low-frequency thermal noise around DC or around harmonics suppressed significantly by the employment of a current-current negative feedback (CCNF) loop, the phase noise in the CCNF LC VCO has been improved by about 10 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise of the CCNF VCO was measured as -112 dBc/Hz at 6 MHz offset from 5.5 GHz carrier frequency. Also, we present a bandwidth-enhanced LC VCO whose tuning range has been increased about 250 % by connecting the varactor to the bases of the cross-coupled pair. The phase noise of the bandwidth-enhanced LC-tank VCO has been improved by about 6 dB at 6 MHz offset compared to the conventional LC VCO. The phase noise reduction has been achieved because the DC-decoupling capacitor Cc prevents the output common-mode level from modulating the varactor bias point, and the signal power increases in the LC-tank resonator. The bandwidth-enhanced LC VCO represents a 12 % bandwidth and phase noise of -108 dBc/Hz at 6 MHz offset.

• Proceedings of the KIPE Conference
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• 2007.11a
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• pp.145-147
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• 2007

This paper presents an implementation of vector control for SMPMSM using model based controller design in MATLAB/SIMULINK. The model based controller design enables fast development of control system for motor by designing controllers and performing simulation on the GUI (Graphic User Interface) platform, converting program code directly into real-time programs, and then performing tests for the responses from controllers. The controller is designed as PI controller for speed and decoupling PI controller for current. And PWM used space vector modulation method using offset voltage and system stability is also secured by close magnitude overmodulation method, maintaining dynamics of load when it overmodulation. The validity of vector control implemented is verified through simulations and experiments.

• Proceedings of the Korean Nuclear Society Conference
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• 1997.10a
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• pp.299-304
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• 1997

A neuro-fuzzy control algorithm is applied for xenon spatial oscillations in a pressurized water reactor. The consequent and antecedent parameters of the fuzzy rules are tuned by the gradient descent mettled. The reactor model used for computer simulations is a two-point xenon oscillation model. The reactor core is axially divided into two regions and each region has one input and one output and is coupled with the other region. The interaction between the regions of the reactor core is treated by a decoupling scheme. This proposed control of mettled exhibits very fast responses to a step or a ramp change of target axial offset without any residual flux oscillations.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.8
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• pp.1383-1391
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• 2008

This paper presents an implementation of vector control for SPMSM using model based controller design in MATLAB/SIMULINK. The model based controller design enables fast development of control system for motor by designing controllers and performing simulation on the GUI (Graphic User Interface) platform, converting program code directly into real-time programs, and then performing tests for the responses from controllers. The controllers designed in this paper are PI speed controller and decoupling PI current controller. Also space vector modulation method using offset voltage is used in PWM scheme. And system stability is also secured by close magnitude overmodulation method, maintaining dynamics of load when overmodulation occurs. The validity of vector control implemented is verified through simulations and experiments.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.11
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• pp.91-98
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• 2004

TFLIM(Transverse Flux Linear Induction Motor), making its closed magnetic path with the direction of the traveling field orthogonal, had been developed to decrease an edge effect of the general induction motor. To control the levitation force and the thrust force on the secondary part of TFLIM independently, the various methodologies have been presented. When we try to achieve the independent control using only the multi-phase inputs assigned in the stator coils as an approach, in which condition we can minimize the coupling effect between two forces\ulcorner In this paper, we show the qualitative influence of a slip frequency, an ac magnitude, a dc offset superposed in the ac power, and a major parameter of TFLIM on the couple through the computer simulation. And to realize the independent motions between levitation and thrust motion without any auxiliary means fur isolation of the secondary part of TFLIM, the decouple compensator is suggested, including the experimental results.

• Journal of information and communication convergence engineering
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• v.10 no.1
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• pp.85-90
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• 2012

A 40-MS/sec 10-bit pipelined analog to digital converter (ADC) with a 1.2 Vpp differential input signal is proposed. The implemented pipelined ADC consists of eight stages of 1.5 bit/stage, one stage of 2 bit/stage, a digital error correction block, band-gap reference circuit & reference driver, and clock generator. The 1.5 bit/stage consists of a sub-ADC, digital to analog (DAC), and gain stage, and the 2.0 bit/stage consists of only a 2-bit sub-ADC. A bootstrapped switch with a constant resistance is proposed to improve the linearity of the input switch. It reduces the maximum VGS variation of the conventional bootstrapped switch by 67%. The proposed bootstrapped switch is used in the first 1.5 bit/stage instead of a sample-hold amplifier (SHA). This results in the reduction of the hardware and power consumption. It also increases the input bandwidth and dynamic performance. A reference voltage for the ADC is driven by using an on-chip reference driver without an external reference. A digital error correction with a redundancy is also used to compensate for analog noise such as an input offset voltage of a comparator and a gain error of a gain stage. The proposed pipelined ADC is implemented by using a 0.18-${\mu}m$ 1- poly 5-metal CMOS process with a 1.8 V supply. The total area including a power decoupling capacitor and the power consumption are 0.95 $mm^2$ and 51.5 mW, respectively. The signal-to-noise and distortion ratio (SNDR) is 56.15 dB at the Nyquist frequency, resulting in an effective number of bits (ENOB) of 9.03 bits.