• Journal of IKEEE
• /
• v.16 no.2
• /
• pp.153-158
• /
• 2012

A new diversity combining scheme is proposed for time-of-arrival (TOA) estimation of chirp signal in dense multipath channel. In the multipath channel, the performance of TOA estimation using conventional correlation matrix-based diversity combining scheme is degraded due to the lack of de-correlation effect. To increase the de-correlation effect, the proposed diversity scheme employs interleaving method based on the property of de-chirped signal. As a result, the proposed scheme increases de-correlation effect and also reduces the noise of TOA estimation. Finally, the diversity achieved from the proposed scheme improves TOA estimation performance. The de-correlation effect is analyzed mathematically. The estimation accuracy of the proposed diversity scheme is superior to that of conventional diversity scheme in multipath channel.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.10 no.8
• /
• pp.1832-1838
• /
• 2009

In this paper, we present new signal de-interleaving method for the frequency agility radar in which the carrier frequency is changed irregularly. Generally radar use a fixed carrier frequency, and it is easy for electronic warfare system to de-interleave the radar signal with respect to the frequency, pulse width(PW), and direction of signal arriving(DOA). In frequency agility radar, it is difficult to de-interleave the radar signals according to the carrier frequency because the frequency is changed irregularly. We suggest a good de-interleaving method to identify the frequency agility radar signals in comparison with PRI's of radars. First we calculate pulse repeat Interval(PRI) of radar in linked-list and queue structure and de-interleave the radar signals with PRI, PW, and DOA, then identify the frequency agility radar. When we use the proposed algorism to the frequency agility radar, we have a good de-interleaving results with electronic warfare systems.

• The Transactions of the Korea Information Processing Society
• /
• v.7 no.10
• /
• pp.3290-3299
• /
• 2000

Digital watermarking has similar concepts with channel coding thechnique for transferring data with minimizing error in noise environment, since it should be robust to various kinds of data manipulation for protecting copyrights of multimedia data. This paper proposes a digital watermarking technique which is robust to various kinds of data manipulation. Intellectual property rights information is encoded using a convolutional code, and block-interleaving technique is applied to prevent successive loss of encoded data. Encoded intelloctual property rithts informationis embedded using spread spectrum technique which is robust to cata manipulation. In order to reconstruct intellectual property rights information, watermark signalis detected by covariance between watermarked image and pseudo rando noise sequence which is used to einbed watermark. Embedded intellectual property rights information is obtaned by de-interleaving and cecoding previously detected wtermark signal. Experimental results show that block interleaving watermarking technique can detect embedded intellectial property right informationmore correctly against to attacks like Gaussian noise additon, filtering, and JPEG compression than general spread spectrum technique in the same PSNR.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.48 no.4
• /
• pp.15-23
• /
• 2011

An interleaver rearranges a channel-encoded data in the symbol unit to spread burst errors occurred in channels into random errors. Thus, the interleaving process makes it difficult for a receiver, who does not have information of the interleaver parameters used in the transmitter, to de-interleave an unknown interleaved signal. Recently, various researches on the reconstruction of an unknown interleaved signal have been studied in many places of literature by estimating the interleaver parameters. They, however, have been mainly focused on the estimation of the block interleaver parameters required to reconstruct the de-interleaver. In this paper, as an extension of the previous researches, we estimate the convolutional interleaver parameters, e.g., the number of shift registers, a shift register depth, and a codeword length, required to de-interleave the unknown data stream, and propose the de-interleaving procedure by reconstructing the de-interleaver.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.26 no.12
• /
• pp.1100-1107
• /
• 2015

In this paper, we propose an algorithm to identify Wobble PRI and Sinusoidal PRI among Radar pulses. We applied not only the DTOA(Difference Time Of Arrival) concept of radar pulse signals incoming to antennas but also a rising and falling cub characteristic of those PRIs. After making a program by such algorithm, we input each 40 data to Wobble PRI's and Sinusoidal PRI's identification programs and in result, those programs fully processed the data the according to expectations. In the future, those programs can be applied to the ESM, ELINT system.

• Transactions of the Korean Society of Automotive Engineers
• /
• v.18 no.4
• /
• pp.54-61
• /
• 2010

In this paper, we design the signal processing unit to effectively support the proposed algorithm for an automotive Frequency Modulation Continuous Wave(FMCW) radar. In the proposed method, we can obtain the distance and velocity with improved error depending on each range(long, middle, and short) of the target. Since a high computational capacity is required to obtain more accurate distance and velocity for target in near range, the proposed signal processing unit employs the time de-interleaving and the frequency interpolation method to overcome the limitation. Moreover, for real-time signal processing, the parallel architecture is used to extract simultaneously the distance and velocity in each range.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.30 no.6C
• /
• pp.450-456
• /
• 2005

In this paper, we propose a high-speed turbo decoding algorithm and present results of its implementation. The latency caused by (de)interleaving and iterative decoding in conventional MAP turbo decoder can be dramatically reduced with the proposed scheme. The main cause of the time reduction is to use radix-4, center to top, and parallel decoding algorithm. The reduced latency makes it possible to use turbo decoder as a FEC scheme in the real-time wireless communication services. However the proposed scheme costs slight degradation in BER performance because the effective interleaver size in radix-4 is reduced to an half of that in conventional method. To ensure the time reduction, we implemented the proposed scheme on a FPGA chip and compared with conventional one in terms of decoding speed. The decoding speed of the proposed scheme is faster than conventional one at least by 5 times for a single iteration of turbo decoding.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.41 no.5
• /
• pp.504-511
• /
• 2016

In this paper, MIMO system based on turbo equalization techniques which LDPC codes were outer code and space time trellis codes (STTC) were employed as an inner code are studied. LDPC decoder and STTC decoder are connected through the interleaving and de-interleaving that updates each other's information repeatedly. In conventional turbo equalization of MIMO system, BCJR decoder which decodes STTC coded bits required two-bit wise decoding processing. Therefore duo-binary turbo codes are optimal for MIMO system combined with STTC codes. However a LDPC decoder requires bit unit processing, because LDPC codes can't be applied to these system. Therefore this paper proposed turbo equalization for MIMO system based on LDPC codes combined with STTC codes. By the simulation results, we confirmed performance of proposed turbo equalization model was improved about 0.6dB than that of conventional LDPC codes.

• ETRI Journal
• /
• v.27 no.5
• /
• pp.525-532
• /
• 2005

In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de)interleaving and iterative decoding in a conventional maximum a posteriori turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is from the combination of the radix-4, center to top, parallel decoding, and early-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit error rate performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. To prove the latency reduction, we implemented the proposed scheme on a field-programmable gate array and compared its decoding speed with that of a conventional decoder. The results show an improvement of at least five fold for a single iteration of turbo decoding.

• Journal of electromagnetic engineering and science
• /
• v.6 no.3
• /
• pp.147-154
• /
• 2006

In this paper, we propose and present implementation results of a high-speed turbo decoding algorithm. The latency caused by (de) interleaving and iterative decoding in a conventional maximum a posteriori(MAP) turbo decoder can be dramatically reduced with the proposed design. The source of the latency reduction is come from the combination of the radix-4, dual-path processing, parallel decoding, and rearly-stop algorithms. This reduced latency enables the use of the turbo decoder as a forward error correction scheme in real-time wireless communication services. The proposed scheme results in a slight degradation in bit-error rate(BER) performance for large block sizes because the effective interleaver size in a radix-4 implementation is reduced to half, relative to the conventional method. Fixed on the parameters of N=212, iteration=3, 8-states, 3 iterations, and QPSK modulation scheme, we designed the adaptive high-speed turbo decoder using the Xilinx chip (VIRTEX2P (XC2VP30-5FG676)) with the speed of 17.78 Mb/s. From the results, we confirmed that the decoding speed of the proposed decoder is faster than conventional algorithms by 8 times.