• Journal of KIISE:Information Networking
• /
• v.32 no.1
• /
• pp.60-67
• /
• 2005

A cluster consists of a collection of interconnected stand-alone computers working together and provides a high-availability solution in application area such as web services or information systems. Content-based load distribution for web server clusters uses the detailed data found in the application layer to intelligently route user requests among web servers. In this paper, we propose a content-based load distribution algorithm that considers cache hit and load information of the web servers under the web server clusters. In addition, we expand this algorithm in order to manage user requests for dynamic file. Specially, our algorithm does not keep track of any frequency of access information or try to model the contents of the caches of the web servers.

• The Transactions of the Korea Information Processing Society
• /
• v.5 no.11
• /
• pp.2763-2775
• /
• 1998

In mobile computing environments, to efficiently use the narrow bandwidth of wireless networks a mobile host caches the data that are frequently accessed. But, because the cached data can be inconsistent with the data n a server due to the host mobility and the disconnection from a server, the usefullness of cached data may be losted. The traditional methods emphasize on the cache consistency and assume that broadcasting times are synchronized at all mobile supprot stations. In this paper, we propose a strategy to maintain cache consistency, which resolves the problems that be caused by the migration of mobile host. The proposed strategy has asynchronous broadcasting time and reduces the communication overhead caused by the synchronization. Also, by preventing the unnecessary messages transmitting from the mobile support station to a mobile host, this strategy can reduce the communication cost and use the narrow bandwidth of wireless networks efficiently.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.9 no.4
• /
• pp.945-951
• /
• 2008

In this paper, a new high performance data cache scheme that improves exploitation of both the spatial and temporal locality is proposed. The proposed data cache consists of a hardware prefetch unit and two sub-caches such as a direct-mapped (DM) cache with a large block size and a fully associative buffer with a small block size. Spatial locality is exploited by fetching and storing large blocks into a direct mapped cache, and is enhanced by prefetching a neighboring block when a DM cache hit occurs. Temporal locality is exploited by storing small blocks from the DM cache in the fully associative buffer according to their activity in the DM cache when they are replaced. Experimental results on Spec2000 programs show that the proposed scheme can reduce the average miss ratio by $12.53%\sim23.62%$ and the AMAT by $14.67%\sim18.60%$ compared to the previous schemes such as direct mapped cache, 4-way set associative cache and SMI(selective mode intelligent) cache[8].

• Journal of the Korea Society of Computer and Information
• /
• v.10 no.6 s.38
• /
• pp.153-166
• /
• 2005

Existing single cache structure has shown difference of hit-ratio according to individually replacement strategy However. It needs new improved cache structure for reducing network traffic and providing advanced hit-ratio. Therefore, this Paper design push agent model using dual cache for increasing hit-ratio by reducing server overload and network traffic by repetition request of persistent and identical information. In this model proposes dual cache structure to do achievement replace gradual cache using by two caches storage space for reducing server overload and network traffic. Also, we show new cache replace techniques and algorithms which executes data update and delete based on replace strategy of Log(Size) +LRU, LFU and PLC for effectiveness of data search in cache. And through an experiment, it evaluates Performance of dual cache push agent model.

• Journal of KIISE
• /
• v.42 no.6
• /
• pp.691-698
• /
• 2015

Application launch time is an important performance metric to user experience in desktop and laptop environment, which mostly depends on the performance of secondary storage. Application launch times can be reduced by utilizing solid-state drive (SSD) instead of hard disk drive (HDD). However, considering a cost-performance trade-off, utilizing SSDs as caches for slow HDDs is a practicable alternative in reducing the application launch times. We propose a new SSD caching scheme which migrates data blocks from HDDs to SSDs. Our scheme operates entirely in the file system level and does not require an extra layer for mapping SSD-cached data that is essential in most other schemes. In particular, our scheme does not incur mapping overheads that cause significant burdens on the main memory, CPU, and SSD space for mapping table. Experimental results conducted with 8 popular applications demonstrate our scheme yields 56% of performance gain in application launch, when data blocks along with metadata are migrated.

• KIPS Transactions on Computer and Communication Systems
• /
• v.10 no.12
• /
• pp.319-328
• /
• 2021

With popularization of services for massive content, the fundamental limitations of TCP/IP networking were discussed and a new paradigm called Information-centric networking (ICN) was presented. In ICN, content is addressed by the content identifier (content name) instead of the location identifier such as IP address, and network nodes can use the cache to store content in transit to directly service subsequent user requests. As the user request can be serviced from nearby network caches rather than from far-located content servers, advantages such as reduced service latency, efficient usage of network bandwidth, and service scalability have been introduced. However, these advantages are determined by how actively content stored in the cache can be utilized. In this paper, we 1) introduce content access schemes in Named-data networking, one of the representative ICN architectures; 2) in particular, review the schemes that allow access to cached content away from routing paths; 3) conduct comparative study on the performance of the schemes using the ndnSIM simulator.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.53 no.6
• /
• pp.91-100
• /
• 2016

In FPGA-based real-time image warping systems, image caches are utilized for fast readout of image pixel data and reduction of memory access rate. However, a cache algorithm for a general computer system is not suitable for real-time performance because of time delays from cache misses and on-line computation complexity. In this paper, a simple image cache algorithm is presented for a FPGA-based real-time image warping system. Considering that pixel data access sequence is determined from the 2D coordinate transformation and repeated identically at every image frame, a cache load sequence is off-line programmed to guarantee no cache miss condition, and reduced on-line computation results in a simple cache controller. An overall system structure using a FPGA is presented, and experimental results are provided to show accuracy and validity of the proposed cache algorithm.

• The Journal of the Korea Contents Association
• /
• v.14 no.11
• /
• pp.28-38
• /
• 2014

In this paper, we propose the distributed cache management scheme to efficiently access small files in Hadoop Distributed File Systems(HDFS). The proposed scheme can reduce the number of metadata managed by a name node since many small files are merged and stored in a chunk. It is also possible to reduce the file access costs, by keeping the information of requested files using the client cache and data node caches. The client cache keeps small files that a user requests and metadata. Each data node cache keeps the small files that are frequently requested by users. It is shown through performance evaluation that the proposed scheme significantly reduces the processing time over the existing scheme.

• The KIPS Transactions:PartD
• /
• v.18D no.1
• /
• pp.1-8
• /
• 2011

The cache structure, which is designed for assuring fast accesses to frequently accessed data, resides on the various levels of computer system hierarchies. Many studies on this cache structure have been conducted and thus many page-replacement algorithms have been proposed. Most of page-replacement algorithms are designed on the basis of heuristic methods by using their own criteria such as how recently pages are accessed and how often they are accessed. This data-retrieval process in computer systems is analogous to human memory retrieval process since the retrieval process of human memory depends on frequency and recency of the retrieval events as well. A recent study regarding human memory cognition revealed that the possibility of the retrieval success and the retrieval latency have a strong correlation with the frequency and recency of the previous retrieval events. In this paper, we propose a novel page-replacement algorithm by utilizing the knowledge from the recent research regarding human memory cognition. Through a set of experiments, we demonstrated that our new method presents better hit-ratio than the LRFU algorithm which has been known as the best performing page-replacement algorithm for DBMS caches.

• The Journal of the Institute of Internet, Broadcasting and Communication
• /
• v.16 no.3
• /
• pp.7-12
• /
• 2016

DRAM is commonly used as a smartphone memory medium, but extending its capacity is challenging due to DRAM's large battery consumption and density limit. Meanwhile, smartphone applications such as social network services need increasingly large memory, resulting in long latency due to additional storage accesses. To alleviate this situation, we adopt emerging nonvolatile memory (NVRAM) as smartphone's buffer cache and propose an efficient management scheme. The proposed scheme stores all dirty data in NVRAM, thereby reducing the number of storage accesses. Moreover, it separately exploits read and write histories of data accesses, leading to more efficient management of volatile and nonvolatile buffer caches, respectively. Trace-driven simulations show that the proposed scheme improves I/O performances significantly.