• Title/Summary/Keyword: DVB-RCS

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A Study on layered Space Time Trellis codes for MIMO system based on Iterative Decoding Algorithm (MIMO 시스템에서 반복 복호 알고리즘 기반의 계층적 시공간 부호화 방식 연구)

  • Park, Tae-Doo;Jung, Ji-Won
    • Journal of Navigation and Port Research
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    • v.36 no.10
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    • pp.845-849
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    • 2012
  • The next-generation wireless communication requires fast transmission speeds with various services and high reliability. In order to satisfy these needs we study MIMO system used layered space time coded system (LST) combining space time trellis codes (STTC) with turbo codes. In LST, two codes that are inner and outer codes are concatenated in the serial fashion. The inner codes are turbo Pi codes suggested in DVB-RCS NG system, and outer codes are STTC codes proposed by Blum. The interleaver technique is used to efficiently combine two codes. And we proposed and simulated that a full iteration method between turbo decoder and BCJR decoder to improve the performance instead of only processing inner-iteration turbo decoder. The simulation results of proposed effective layered method show improving BER performance about 1.3~1.5dB than conventional one.

The Study of Bit Split Methods and Double Binary Turbo Code for Additional Service of Advanced T-DMB (차세대 T-DMB 방송의 부가 서비스 제공을 위한 비트 분리 방법 및 Double Binary Turbo 부호 적용 연구)

  • Kim, Nam-Soo;Bae, Jong-Tae;Kim, Min-Hyuk;Jung, Ji-Won
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.10
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    • pp.1065-1074
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    • 2008
  • T-DMB(Terrestrial Digital Multimedia Broadcasting) system, is based on the Eureka-147 standard, provides various multimedia data services. However T-DMB system needs upgrades for more various services and better services. Therefore, we proposed advanced T-DMB system using unequal error protection system and hierarchical modulation in this paper while maintaing backward compatibility. And we simulated various bit split methods and double binary turbo code of DVB-RCS standard as method of LP data stream for additional service of advanced T-DMB. As the simulation results, double binary turbo code of proposed advanced T-DMB system have each coding gain of over 2 dB compared to conventional T-DMB.

Dynamic MF-TDMA Framing Strategy For Improving Satellite Resource Efficiency (위성 자원 효율 증대를 위한 동적 MF-TDMA 프레이밍 기법)

  • Ko, Sang-Soon;Kim, Eun-Kyung;Lim, Jae-Sung
    • Proceedings of the Korean Information Science Society Conference
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    • 2012.06d
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    • pp.445-446
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    • 2012
  • 본 논문에서는 MF-TDMA(Multiple Frequency - Time Division Multiple Access) 방식을 이용하는 위성 시스템의 위성 자원 효율을 높이기 위한 동적 MF-TDMA 프레이밍 기법을 제안한다. DVB-RCS (Digital Video Broadcasting - Return Channel via Satellite)은 감우감쇠를 극복하기 위해 ACM (Adaptive Coding and Modulation) 기법을 사용한다. MF-TDMA에서는 하나의 채널이 동일한 ACM 모드를 지원하기 때문에 사용자의 채널 상태와 요청량을 고려하여 실제로 요구되는 ACM 모드를 지원하는 채널의 수를 계산한다. 모의실험을 통해 채널 상태 변화를 고려하지 않은 정적인 방식에 비해 제안하는 동적인 방식의 위성 자원 효율이 증가한 것을 확인할 수 있었다.

Packet Scheduling in Interactive Satellite Return Channels for Mobile Multimedia Services Using Hybrid CDMA/TDMA

  • Lee Ki-Dong;Kim Ho-Kyom;Lee Ho-Jin
    • Proceedings of the Korean Operations and Management Science Society Conference
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    • 2003.05a
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    • pp.744-748
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    • 2003
  • Developing an interactive satellite multi­media system, such as a digital video broadcasting (DVB) return channel via satellite (RCS) system, is gaining popularity over the world To accommodate the increasing traffic demand we are motivated to investigate an alternative for improving return channel utilization We develop an efficient method for optimal packet scheduling in an interactive satellite multimedia system using hybrid CDMA/TDMA channels. We formulate the timeslot-code assignment problem as a binary integer programming (BIP) problem, where the throughput maximization is the objective, and decompose this BIP problem into two sub-problems for the purpose of solution efficiency. With this decomposition, we promote the computational efficiency in finding the optimal solution of the original BIP problem Since 2001, ETRI has been involved in a development project where we have successfully completed an initial system integration test on broadband mobile Internet access via Ku-band channels using the proposed resource allocation algorithm.

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Low Latency Encoding Algorithm for Duo-Binary Turbo Codes with Tail Biting Trellises (이중 입력 터보 코드를 위한 저지연 부호화 알고리즘)

  • Park, Sook-Min;Kwak, Jae-Young;Lee, Kwy-Ro
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.46 no.2
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    • pp.47-51
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    • 2009
  • The low latency encoder for high data rate duo-binary turbo codes with tail biting trellises is considered. Encoder hardware architecture is proposed using inherent encoding property of duo-binary turbo codes. And we showed that half of execution time as well as the energy can be reduced with the proposed architecture.

A Study about Performance Improvement of Return Link Demodulator for Satellite Communication (위성 통신용 리턴 링크 복조기의 성능 개선에 관한 연구)

  • Wang, Do-Huy;Oh, Deock-Gil
    • Journal of Satellite, Information and Communications
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    • v.7 no.1
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    • pp.92-96
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    • 2012
  • This paper presents return link demodulation algorithm designed for hardware implementation using HDL that include complex signal processing work reliably even in low SNR. Simulation results show that performance of Es/$N_0$ has improved within 0.5dB at the point of uncoded BER $10^{-3}$ compared to the ideal QPSK signal. In addition, fixed-point simulation and HDL implementation performance compared to the simulation we can see that there is no difference.

Resource Allocation Information Sorting Algorithm Variable Selection Scheme for MF-TDMA DAMA Satellite Communication System (MF-TDMA DAMA 위성통신 시스템에서의 자원할당정보 정렬 알고리즘 가변 선택기법 연구)

  • Park, Nam Hyoung;Han, Joo-Hee;Han, Ki Moon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.21 no.2
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    • pp.1-7
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    • 2020
  • In modern society, as technology has advanced and human life area has expanded, there has been an increasing demand for high-quality voice and video communications services without restrictions on time and place. In response to this demand, satellite communications systems that provide a wide range of communications and that offer multiple access are evolving day by day. In satellite communications systems such as Digital Video Broadcasting - Return Channel Via Satellite (DVB-RCS) and Warfighter Information Network-Tactical (WIN-T), the multi-frequency time division multiple access (MF-TDMA) demand assigned multiple access (DAMA) scheme is used for efficient resource allocation. In this scheme, since the satellite terminals periodically request resources from the network controller, and the network controller dynamically allocates resources, it is necessary to arrange resource allocation information from time to time. Shortening of the alignment time is a more important factor in a satellite communications system in which a long transmission delay occurs due to long-distance transmission and reception. In this paper, we propose a sorting algorithm variable-selection scheme that shortens the sorting time by cross-selecting the sorting algorithm based on a threshold value, while setting the number of frames in the MF-TDMA DAMA satellite communications system as the threshold value.

Design and Implementation of FPGA-based High Speed Multimedia Data Reassembly Processor (FPGA 기반의 고속 멀티미디어 데이터 재조합 프로세서 설계 및 구현)

  • Kim, Won-Ho
    • Journal of the Institute of Convergence Signal Processing
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    • v.9 no.3
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    • pp.213-218
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    • 2008
  • This paper describes hardware-based high speed multimedia data reassembly processor for remote multimedia Set-Top-Box(MSTB) of interactive satellite multimedia communication system. The conventional multimedia data reassembly scheme is based on software processing of MSTB. As increasing of transmission rate for multimedia data services, the CPU load of remote MSTB is increased and reassembly performance of MSTB is limited. To provide high speed multimedia data service to end user, we proposed hardware based high speed multimedia data reassembly processor. It is implemented by using an FPGA, a PCI interface chip, and RAMs. And it is integrated in MSTB and tested. It has been confirmed to meet required all functions and processing rate up to 116Mbps.

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