• Journal of IKEEE
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• v.5 no.2 s.9
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• pp.146-152
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• 2001

Two control techniques - PI and LQR(Linear Quadratic Regulator) - of DSTATCOM (Distribution Static Synchronous Compensator) for line voltage regulation in distribution system are presented. It is shown that the voltage waveform is improved if the proposed methods are applied in IEEE 13 radial distribution system using PSCAD/EMTDC package in case of single line-to-ground fault. The three cases - without control, with PI control and with LQR control - are compared. The LQR control is shown to be best in respect of response profile and control effort required among them.

• Journal of Power Electronics
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• v.5 no.4
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• pp.329-334
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• 2005

The DSTATCOM(Distribution Static Synchronous Compensator) is one of the Custom Power Devices that can regulate voltage. The DSTATCOM operates as a shunt connected static var compensator whose capacitive or inductive output current can be controlled independent of the system voltage. The magnitude of the compensated voltage is limited by characteristics of the system and the load. Compensation capability of the DSTATCOM which can inject 1 MVAR reactive power was simulated by EMTDC under several conditions. This paper analyzes the effect of the DSTATCOM's compensation considering the length and kind of distribution line, the power factor and magnitude of the load, and the duration and magnitude of the voltage variation.

• Journal of Power Electronics
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• v.15 no.3
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• pp.830-840
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• 2015

The H-bridge inverter is the fundamental power cell of the cascaded distribution static synchronous compensator (DSTATCOM). Thus, cell reliability is important to the compensation performance and stability of the overall system. The concept of the power electronics building block (PEBB) is an ideal solution for the power cell design. In this paper, an H-bridge inverter-based “plug and play” HPEBB is introduced into the main circuit and the controller to improve the compensation performance and reliability of the device. The section that discusses the main circuit primarily emphasizes the design of electrical parameters, physical structure, and thermal dissipation. The section that presents the controller part focuses on the principle of complex programmable logic device -based universal controller This section also analyzes typical reliability and anti-interference issues. The function and reliability of HPEBB are verified by experiments that are conducted on an HPEBB test-bed and on a 10 kV/± 10 Mvar DSTATCOM industrial prototype.

• Journal of Energy Engineering
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• v.13 no.1
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• pp.68-74
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• 2004

This paper presents the design of DSTATCOM (Distribution Static Synchronous Compensator) controller. The results are verified by using PSCAD/EMTDC package. The state equation derived by decomposition analysis of DSTATCOM current component is applied to load model and the combined model which considered constraint condition. In case of single line to ground fault, the conventional method of Pl control is compared with LQR control technique. LQR control is shown to be superior in terms of response profile and composition of voltage sag.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1139-1146
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• 2014

Digital signal processor (DSP) and field programmable gate array (FPGA) based concentrated control systems are designed for implementing CPS-SPWM strategies. The self-defined universal asynchronous receiver/transmitter (UART) protocol is used for communication between a master controller and an individual module controller via high speed links. Aimed at undesired pulse competition, this paper analyzes its generation mechanism and presents a new method for eliminating competition pulses with no time delay. Finally, the proposed concentrated controller is applied to a 10kV/10MVar distribution static synchronous compensator (DSTATCOM) industrial prototype. Experimental results show the accuracy and reliability of the concentrated controller, and verify the superiority of the proposed elimination method for competition pulses.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.249-250
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• 2008

본 논문은 고창 전력품질 실증시험장에서 실 계통 연계를 위해 시험 중인 1.5M급 풍력발전 시뮬레이터의 선로정수를 PSCAD/EMTDC를 이용하여 모의하고 선로정수에 따른 풍력발전시스템이 계통에 미치는 영향을 분석하는데 중점을 두었다. 현재 고창에 설치되어있는 전력품질 실증시험장은 22.9kV 급전선에 SSTS(Synchronous Static Transfer Switch)의 한쪽 스위치로 직접 연결되어있으며 다른 한 쪽은 전력계통에서 발생되는 다양한 형태의 이벤트를 발생시키는 SSHG(Sag Swell Harmonics Generator)를 통하여 연결되어있다. 전력품질 향상기기중 하나인 DVR(Dynamic Voltage Restorer)는 SSTS의 부하쪽으로 직렬로 연결되어있으며 delta-wye 변압기를 통해 정류기 부하와 APF(Active Power Filter), 그리고 순저항부하와 유도성부하가 연결되어 있고 또한 SSHG를 통하여 연결된 배전선에는 DSTATCOM(Distribution Static Compensator)가 병렬로 연결되어있다. 본 논문에서는 고창에 있는 풍력발전 시뮬레이터와 동일하게 PSCAD/EMTDC로 구성하였으며 선로정수를 모델링 하기 위해 선로모델을 10Km, 20Km, 30Km, 40Km,로 설정하여 선로정수에 따른 계통영향을 분석하여 풍력발전 시뮬레이터에서 모의가능 한 선로정수 값을 제시한다.