• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2002.11a
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• pp.205-208
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• 2002

The stand-alone transmission system design on compressed still image using DSP processor and Wavelet is presented. The target system is based on 32bits DSP processor. The image is compressed with Wavelet. The system for NTSC format image signal is able to transmit still image data to be high speed and is applicable to a surveillance and inspection system independently.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.9
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• pp.76-84
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• 1992

The DSP silicon compiler consists of language compiler, module generator, placement tool, router, layout generation tools, and simulator. In this paper, The language compiler, the module generator, placement tool, and simulator were developed and provided for the system designer. The language compiler translates the designer's system description language into the intermediate form file. The intermediate form file expresses the interconnections and specifications of the cells in the cell library. The simulator was developed and provided for the behavioral verification of the DSP system. For its implementation, the event-driven technique and the C$^{++}$ task library was used. The module generator was developed for the layout of the verified DSP system, and generates the functional block to be used in the DSP chip. And then the placement tool determines the appropriate positions of the cells in the DSP chip. In this paper, the placement tool was implemented by Min-Cut and Simulated Annealing algorithm. The placement process can be controlled by the several conditions input by the system designer.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1428-1436
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• 2000

An adaptive predistorter linearizer suitable for the DSP implementation is proposed. Predistortion is performed by the DSP instead of the analog predistorter. RLS algorithm is employed for the optimization process to minimize the errors between the predistorter and postdistorter output signals. Computer simulation results for our linearizer show good performance.

• Proceedings of the KIEE Conference
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• 1993.07a
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• pp.453-455
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• 1993

In this research, the digital signal processing PC board which employs TI's TMS320C25 is implemented. The board can perform following functions. spectrum analysis of speech and repetitive signal, digital filters emulation by convolution, signal generation of sinusoidal wave, rectangular wave etc.. In this system, communications between PC and DSP board. program down-loading to DSP board and recording and graphic of acquired and processed data in DSP board are executed by PC. Parallel interface and buffer memory are used in communications. Data acquisition and operation are carried out in DSP board. Resultant data are transmitted to PC and output through DAC.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2004.05b
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• pp.129-132
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• 2004

The iris image recognition system realization using DSP processor(TMS320DM642) for the faster real-time processing is presented on this paper. The system is composed of CCD camera, DSP processing and network part to link the communication. The system leads the iris recognition processing time to be faster. The simulation results in 0.9sec below approximately.

• Journal of the Korean Society for Precision Engineering
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• v.16 no.3 s.96
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• pp.38-46
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• 1999

Spindle motor current is used to estimate the cutting force indirectly and control the feed rate for the cutting force regulation. The proposed algorithm is implemented to a DSP board based hardware for the industrial application. The software to make POP terminal communicate with the DSP board and POP server is coded under Windows 95 environment. Experiments under varying cutting conditions show that the DSP board recognizes the information of installed cutting tool and cutting conditions delivered from the POP server to use them for the proper control of the feed rate. The cutting force is regulated well during machining of tapered or stepped workpiece and circular shaped workpiece as well.

• Journal of the Korean Institute of Intelligent Systems
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• v.18 no.3
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• pp.323-328
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• 2008

This paper presents a Digital Signal Processor achieving high through-put for both decision intensive and computation intensive tasks. The proposed processor employees a multiplier, two ALU and load/store. Unit as operational units. Those four units are controlled and works parallel by superscalar control scheme, which is different from prior DSP architecture. The performance evaluation was done by implementing AC-3 decoding algorithm and 37.8% improvement was achieved. This study is valuable especially for the consumer electronics applications, which require very low cost.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.962-964
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• 2014

신호처리 시스템에서 FFT는 많이 사용되고 있으며, 고속화를 위하여 많은 연구가 진행되어 왔다. FFT은 통신, 영상처리, 레이더 등 많은 영역에서 직접 또는 변형되어 많이 활용되고 있으나 실시간 처리 속도 한계와 가격의 문제로 FFT 길이가 제한되는 경우가 많다. 본 연구에서는 TI사의 고속 DSP인 8 core의 TMS320C6678에 OpenMP 병렬처리 기법으로 FFT를 구현한 결과를 제시한다. 속도 개선을 위한 다양한 병렬처리 방안에 대하여 단일 FFT의 길이별 성능과 다중 FFT를 처리하기 위한 방안을 제안하였다. 이러한 OpenMP기반의 FFT는 DSP간 hyperlink 연결로 다수의 DSP로 병렬처리로 성능 개선이 가능하며, 본 연구에서는 16 core로 확장하여 그 성능이 30% 내외 개선되는 것을 보였다. 본 연구 결과는 초 고속 신호처리가 요구되는 의료영상, 초고해상도 영상처리, 고정밀 레이더 등에 활용이 가능할 것이다.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2011.06a
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• pp.725-726
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• 2011

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.10
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• pp.3859-3865
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• 2010

Modeling a virtual reader and tags, the emulator system is realized by using a commercial signal generation device to make signal, a data collection equipment, and DSP board. By using a Virtual UHF RFID (860 ~ 960 [MHz]) reader/tags module, a developed RFID reader, protocol of tag, and properties of RF support to provide the way how to verify the suitability to international standards (ISO 18000-6 Type C, EPCglobal C1G2). In this paper, to implement a proposed model reader and tag model, Visual DSP is applied by using DSP board, composing the system's signal generators, signal analyzers and performance verification, the target readers or tags, RFID emulator control computesr and control programs.