• The Transactions of the Korean Institute of Electrical Engineers P
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• v.54 no.1
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• pp.20-29
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• 2005

This paper presents an implementation of efficiency optimization of reluctance synchronous motor (RSM) using a neural network (NN) with a direct torque control (DTC). The equipment circuit considered with iron losses in RSM is analyzed theoretically, and the optimal current ratio between torque current and exiting current component are derived analytically. For the RSM driver, torque dynamic can be maintained with DTC using TMS320F2812 DSP Controller even with controlling the flux level because a torque is directly proportional to the stator current unlike induction motor. In order to drive RSM at maximum efficiency and good dynamics response, the Backpropagation Neural Network is adapted. The experimental results are presented to validate the applicability of the proposed method. The developed control system show high efficiency and good dynamic response features with 1.0 [kW] RSM having 2.57 inductance ratio of d/q.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.1B
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• pp.34-41
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• 2002

In this paper, the algorithms increase the capacity of the forward link channel are studied in the DS-CDMA mobile communication system with the technology of transmit antenna array. Through of the implementation of the test bed with PC and DSP boards, the hardware implementation and optimization of the algorithms, the operation scenario and architecture of the test bed, are considered. In addition, the performance analyses are achieved about the execution time of the algorithms.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.7
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• pp.1102-1109
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• 2001

This paper presents the new architecture of an adaptive predistortion linearizer using the polynomial type predistorter. In the proposed linearizer, most of the processes, including the predistortion, are performed with a digital signal processor(DSP). The recursive least squares(RLS) algorithm is employed for the optimization process to minimize the errors between the predistorter and postdistorter output signals. Simulation results demonstrate that the adjacent channel power ratio(ACPR) is improved by greater than 40 dB at the band edge with linearization. The convergence and reconvergence performance of the linearizer is also satisfactory.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2008.10a
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• pp.592-595
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• 2008

This paper presents development of automatic image quality register optimization system using mobile TFT-LCD (Thin Film Transistor-Liquid Crystal Display) driver IC and embedded software. It optimizes automatically gamma adjustment and voltage setting registers in mobile TFT-LCD driver IC to improve gamma correction error, adjusting time, flicker noise and contrast ratio. Developed algorithms and embedded software are generally applicable for most of the TFT-LCD modules. The proposed optimization system contains module-under-test (MUT, TFT-LCD module), control program, multimedia display tester for measuring luminance, flicker noise and contrast ratio, and control board for interface between PC and TFT-LCD module. The control board is designed with DSP and FPGA, and it supports various interfaces such as RGB and CPU.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.38 no.3
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• pp.304-315
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• 2001

In this paper, we peformed the real-time implementation of AMR(Adaptive Multi-Rate) speech coding algorithm which is adopted for IMT-2000 service using TMS320C6201, i.e., a Texas Instrument´s fixed-point DSP. With the ANSI C source code released from ETSI, optimization is performed to make it run in real-time with memory as small as possible using the C compiler and assembly language. Implemented AMR speech codec has the size of 32.06 kWords program memory, 9.75 kWords data RAM memory, and 19.89 kWords data ROM memory. And, The time required for processing one frame of 20 ms length speech data is about 4.38 ms, and it is short enough for real-time operation. It is verified that the decoded result of the implemented speech codec on the DSP is identical with the PC simulation result using ANSI C code for test sequences. Also, actual sound input/output test using microphone and speaker demonstrates its proper real-time operation without distortions or delays.

• The Transactions of the Korea Information Processing Society
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• v.4 no.1
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• pp.255-269
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• 1997

In this paper, we describe the implementation of C cross-compiler for the ES-C2340 DSP2 processor by using the GNU compiler. For the rapid and efficient developing of the compiler and other parts like the processor-dependent back -end which is implemented newly to build the compiler. This approach has several advantages. First, as we use GNU compiler's well-proved excellent optimization method and multi-language support capability, we can improve he efficiency and generality of the compiler. Second, as we concentrate on the high-level language as logic approving tool in processor developing process. And to support the cross-compiler, we also implement a text-level pre-linker.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.3
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• pp.1-7
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• 1999

In this research, transformation-based optimization techniques for pipelined designs have been developed. The transformation-based optimization techniques include pipelined architecture transformations and retiming transformations. The new transformation method has the following three features. First, the overall performance of a pipelined system is optimized owing to various transformations including retiming of multiple pipelined blocks. Second, these techniques can be used to search a large solution space by allowing efficient exploration of trade-offs between area and performance. Third, these techniques can be easily extended to a new transformation or algorithm and can be used to optimize memory or bus architectures. Experimental results illustrate that these transformation-based optimization techniques improve area by 21% and performance by 17% on the average for a set of pipelined designs. Especially, the techniques are useful to efficiently explore a large design space.

• Proceedings of the IEEK Conference
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• 2001.09a
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• pp.257-260
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• 2001

본 논문에서는 2 채널 MAIN 프로필 MPEG-2 AAC 복호화 시스템의 구조를 제안하고 구현하였다. 복호화 알고리듬의 구조적인 모듈화에 근거하여, 시스템 설계 과정에서 전체 시스템을 3 개의 하드웨어 모듈로 분할하였다. 전체 시스템은 허프만 복호화기, 예측기, 20 비트 고정소수점 DSP 코어로 이루어져 있다. 허프만 복호화기는 주어진 작업을 1 클럭 사이클 내에 수행할 수 있는 고속의 하드와이어드 모듈이고, 예측기는 높은 해상도를 가지고 다른 모듈들과 병렬처리가 가능한 구조를 가진 모듈이다. 구현된 시스템은 16.9 MIPS 로 2 채널의 MPEG-2 AAC 비트열을 고음질로 복호화할 수 있다.

• Proceedings of the Korea Society for Simulation Conference
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• 2001.05a
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• pp.55-61
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• 2001

본 논문에서는 시뮬레이션 기반 최적화에서 유전자 알고리즘을 이용하여 후보 모델을 자동으로 생성하는 기법을 제안하였다. 이 방법론은 잘 알려진 계획-생성-평가의 틀을 기반으로 구축되었다. 계획은 확장된 AND-OR 트리(AND, OR, Multiple AND 노드를 갖는 트리)를 이용하여 가능한 모든 후보 모델을 표현하였고, 이러한 트리 상에서 후보 모델을 자동생성하기 위하여 유전자 알고리즘을 사용하였다. 마지막으로 생성된 후보 모델을 평가하기 위하여, 시뮬레이션을 수행하였다. 시뮬레이션을 이용한 평가를 통하여 목적에 맞는 후보 모델을 찾을 수 있게 된다. 본 논문에서 제시한 방법론의 효율성은 DSP 프로세서 설계 예제를 통하여 보여주었다.

• Proceedings of the KIEE Conference
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• 1999.11b
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• pp.232-235
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• 1999

This paper presents a HNN(Hopfield Neural Network) model to solve the ORP(Optimal Routing Problem) in DSP(Distribution System Planning). This problem is generally formulated as a combinatorial optimization problem with various equality and inequality constraints. Precedent study[3] considered only fixed cert, but in this paper, we proposed the capability of optimization by fixed cost and variable cost. And suggested the corrected formulation of energy function for improving the characteristics of convergence. The proposed algorithm has been evaluated through the sample distribution planning problem and the simmulation results are presented.