• Title/Summary/Keyword: DSP(Digital Signal Processor) controller

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The Design of Variable Structure Position Controller for Bushless DC Motor Using New Switching Function (새로운 스위칭 함수를 이용한 브러시리스 직류 전등기의 가변 구조 위치 제어기 설계)

  • Chun, Hee-Young;Park, Gwi-Tae;Koh, Po-Hyoung;Lee, Sang-Lak;Song, Myung-Hyun;Yeo, Hyeong-Gee
    • Proceedings of the KIEE Conference
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    • 1990.07a
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    • pp.336-339
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    • 1990
  • This paper discusses the application of VSCS(Variable Structure Control System) to position control of a trapezoidal type brushless DC motor. In order to simplify the overall control system and to improve the robustness, a new switching function which is composed of linear combination of only measurable state variables Sr(x) and Sr(x) is defined. The proposed new switching function is implemented using a digital signal processor(DSP). A general PWM amplifier is replaced by an ON-OFF pattern generator for the hardware simplification and digitalization. Experimental results are given to demonstrate the validity of the proposed control method.

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Design of Force Measuring System for Deburring Using Industrial Robot (산업용로봇을 이용한 디버링을 위한 힘측정시스템 설계)

  • Lee, Gyeong Jun;Kim, Han Sol;Kim, Chong Jin;Kim, Hyeon Min;Kim, Gab Soon
    • Journal of the Korean Society for Precision Engineering
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    • v.32 no.7
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    • pp.653-660
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    • 2015
  • This paper describes the design of the force measuring system for an industrial robot's deburring work. The force measuring system is composed of a three-axis force sensor, a measuring device, a housing and a cover. The three-axis force sensor can detect x-direction force, y-direction force and z-direction force at the same time. The measuring device is designed using DSP(Digital Signal Processor), and have a RS-232 and a RS-485 communication port for sending force data to PC or other controller. As a result of test, the repeatability error and the non-lineality error of the three-axis force sensor are less than 0.03%, and the interference error of the sensor is less than 0.95%. It is thought that the force measuring system can be used for an industrial robot's deburring work.

FPGA Modem Platform Design for eHSPA and Its Regularized Verification Methodology (eHSPA 규격을 만족하는 FPGA모뎀 플랫폼 설계 및 검증기법)

  • Kwon, Hyun-Il;Kim, Kyung-Ho;Lee, Chung-Yong
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.2
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    • pp.24-30
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    • 2009
  • In this paper, the FPGA modem platform complying with 3GPP Release 7 eHSPA specifications and its regularized verification flow are proposed. The FFGA platform consists of modem board supporting physical layer requirements, MCU and DSP core embedded control board to drive the modem board, and peripheral boards for RF interfacing and various equipment interfaces. On the other hand, the proposed verification flow has been regularized into three categories according to the correlation degrees of hardware-software inter-operation, such as simple function test, scenario test call processing and system-level performance test. When it comes to real implementations, the emulation verification strategy for low power mobile SoC is also introduced.

A Simplified Synchronous Reference Frame for Indirect Current Controlled Three-level Inverter-based Shunt Active Power Filters

  • Hoon, Yap;Radzi, Mohd Amran Mohd;Hassan, Mohd Khair;Mailah, Nashiren Farzilah;Wahab, Noor Izzri Abdul
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1964-1980
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    • 2016
  • This paper presents a new simplified harmonics extraction algorithm based on the synchronous reference frame (SRF) for an indirect current controlled (ICC) three-level neutral point diode clamped (NPC) inverter-based shunt active power filter (SAPF). The shunt APF is widely accepted as one of the most effective current harmonics mitigation tools due to its superior adaptability in dynamic state conditions. In its controller, the SRF algorithm which is derived based on the direct-quadrature (DQ) theory has played a significant role as a harmonics extraction algorithm due to its simple implementation features. However, it suffers from significant delays due to its dependency on a numerical filter and unnecessary computation workloads. Moreover, the algorithm is mostly implemented for the direct current controlled (DCC) based SAPF which operates based on a non-sinusoidal reference current. This degrades the mitigation performances since the DCC based operation does not possess exact information on the actual source current which suffers from switching ripples problems. Therefore, three major improvements are introduced which include the development of a mathematical based fundamental component identifier to replace the numerical filter, the removal of redundant features, and the generation of a sinusoidal reference current. The proposed algorithm is developed and evaluated in MATLAB / Simulink. A laboratory prototype utilizing a TMS320F28335 digital signal processor (DSP) is also implemented to validate effectiveness of the proposed algorithm. Both simulation and experimental results are presented. They show significant improvements in terms of total harmonic distortion (THD) and dynamic response when compared to a conventional SRF algorithm.