• Proceedings of the KIPE Conference
• /
• 2020.08a
• /
• pp.316-317
• /
• 2020

In this paper, a novel six-level inverter is proposed. Voltage regulation is applied at DC-link and flying capacitors through the implementation of phase-shifted carrier-based modulation with zero-sequence voltage injection. The performance of the proposed structure has been verified under various modulation indices, where low voltage ripple is achieved at each capacitor and total harmonic distortions (THD) of line voltage at unity modulation index is about 15.95%.

• Journal of Electrical Engineering and information Science
• /
• v.1 no.2
• /
• pp.109-118
• /
• 1996

This paper deals with a new multi-level high voltage source inverter with GTO Thyristors. Recently, a multi-level approach seems to be the best suited for implementing high voltage conversion systems because it leads to harmonic reduction and deals with safe high power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multi-level inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multi-level inverter structure is proposed.

• The Transactions of the Korean Institute of Electrical Engineers B
• /
• v.51 no.10
• /
• pp.581-586
• /
• 2002

To improve the current waveform of diode rectifiers, we propose a new operating principle for the voltage-doubler diode rectifiers. In the conventional voltage-doubler rectifier circuit, relatively large capacitors are used to boost the output voltage, while the proposed circuit uses smaller ones and a small reactor not to boost the output voltage but improve the input current waveform. A circuit design method is shown by experimentation and confirmed simulation. The experimental results of the proposed diode rectifier satisfies the harmonic guide lines. A high input power factor of 97(%) and an efficiency of 98[%] are also obtained. The new rectifier with no controlled switches meet the harmonic guide lines, resulting in a simple, reliable and low-cost at-to dc converters in comparison with the boost-type current-improving circuits. This paper proposes a nonlinear impedance circuit composed by diodes and inductors or capacitors. This circuit needs no control circuits and switches, and the impedance value is changed by the polarity of current or voltage. And this paper presents one of these applications to improve the input current of capacitor input diode rectifiers. The rectifier using the nonlinear impedance circuit is constructed with four diodes and four capacitors in addition to the conventional rectifiers, that is, it has eight diodes and five capacitors, including a DC link capacitor. It makes harmonic components of the input current reduction and the power factor improvement. Half pulse-width modulated (HPWM) inverter was explained compared with conventional pulse width modulated(PWM) inverter. Proposed HPWM inverter eliminated dead-time by lowering switching loss and holding over-shooting.

• Proceedings of the KIPE Conference
• /
• 1999.07a
• /
• pp.266-269
• /
• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both voltage-fed and current-fed electronic ballast. The proposed PFC circuits use valley-fill(VF) type DC-link stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant capacitors. In current-fed type, the charge pump capacitors are connected with the additional secondary-side of the power transformer. The measured PF and THD are higher than 0.99 and 15% for all proposed PFC circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for implementing cost-effective electronic ballast.

• Proceedings of the KIEE Conference
• /
• 2008.04c
• /
• pp.113-115
• /
• 2008

At the high speed operation, the high demagnetization voltage can reduce the negative torque, so the output power and efficiency can be improved. In this paper, a novel power converter for single phase SRM with high demagnetization voltage is proposed. A simple passive capacitor circuit is added in the front-end, which consists of three diodes and one capacitor. Based on this passive network, the two capacitors can be connected in series and parallel, so the phase winding of SRM obtains general do-link voltage in excitation mode and the double dc-link voltage in demagnetization mode. The operation modes of the proposed converter are analyzed in detail. Some computer simulation results is done to verify the performance of proposed converter.

• The Transactions of the Korean Institute of Electrical Engineers B
• /
• v.54 no.5
• /
• pp.231-237
• /
• 2005

Many conventional multi-level inverters have detected switching faults by using the over voltage and current. However, fault detection of the switching elements is very difficult because the voltage and current due to each switching fault decrease more than the normal operation. Moreover, the dc-link unbalancing voltage causes a serious problem in the safety and reliability of system when the 3-level inverter faults occur Therefore, this paper proposes the simple fault diagnose method and the neutral-point-voltage control method that can protect the 3-level inverter system from the unbalancing voltage of the do-link capacitors when the faults of switching elements occur in the 3-level inverter that is very efficient in ac motor drives of the high voltage and high power applications. Through experiment results, the validity of the proposed method is demonstrated.

• The Transactions of the Korean Institute of Electrical Engineers A
• /
• v.49 no.6
• /
• pp.272-279
• /
• 2000

This paper describes a controller design and dynamic performance analysis of UPFC based on 3-level inverters. Major attention is focused on the controller design for both shunt and series inverters, including regulator design for the dc link voltage sharing across the dc capacitors. An energy-based approach was investigated for effectively designing the controller. A detailed UPFC model has been developed with EMTP using 24-pulse 3-level inverters to verify this approach. Simulation results about dynamic performance of UPFC confirm effects for increasing transmission capacity and damping low-frequency oscillation. The developed simulation model would be very effective to analyze the dynamic performance of UPFC.

• Proceedings of the KIPE Conference
• /
• 2002.11a
• /
• pp.125-128
• /
• 2002

In this paper, a novel on-line do capacitance estimation method for the PWM converter is proposed. At no load, Input current at a low frequency is injected, which causes do voltage ripple. With the ac voltage and current ripple components of the dc side, the capacitance can be calculated. Experimental result shows that the estimation error is less than $2\%$.

• Journal of Power Electronics
• /
• v.15 no.5
• /
• pp.1264-1273
• /
• 2015

An inverter output power control based power factor correction (PFC) strategy is being extensively used for permanent magnet synchronous motor (PMSM) drives in appliances because such a strategy can considerably reduce the cost and size of the inverter. In this strategy, PFC circuits are removed and large electrolytic DC-link capacitors are replaced with small film capacitors. In this application, the PMSM d-q axes currents are controlled to produce ripples, the frequency of which is twice that of the AC main voltage, to obtain a high power factor at the AC mains. This process indicates that the PMSM operates under periodic magnetic saturation conditions. This paper proposes a back electromotive-force (back-EMF) estimator for the high-speed sensorless control of PMSM operating under periodic magnetic saturation conditions. The transfer function of the back-EMF estimator is analyzed to examine the effect of the periodic magnetic saturation on the accuracy of the estimated rotor position. A simple compensation method for the estimated position errors caused by the periodic magnetic saturation is also proposed in this paper. The effectiveness of the proposed method is experimentally verified with the use of a PMSM drive for a vacuum cleaner centrifugal fan, wherein the maximum operating speed reaches 30,000 rpm.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.21 no.3
• /
• pp.224-230
• /
• 2016

In this study, a single-power-conversion series-resonant ac-dc converter with high efficiency and high power factor is proposed. The proposed ac-dc converter consists of single-ended primary-inductor converter with an active-clamp circuit and a voltage doubler with series-resonant circuit. The active-clamp circuit clamps the surge voltage and provides zero-voltage switching of the main switch. The series-resonant circuit consists of leakage inductance $L_{lk}$ of the transformer and resonant capacitors $ C_{r1}$ and $ C_{r2}$. This circuit also provides zero-current switching of output diodes $D_1$ and $D_2$. Thus, the switching loss of switches and reverse-recovery loss of output diodes are considerably reduced. The proposed ac-dc converter also achieves high power factor using the proposed control algorithm without the addition of a power factor correction circuit and a dc-link electrolytic capacitor. A detailed theoretical analysis and the experimental results for a 1kW prototype are discussed.