• Proceedings of the IEEK Conference
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• 2002.06e
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• pp.307-310
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• 2002

A design for the input filter and the output filter of a single-phase UPS system is proposed. And also, this paper describes a reduction of the DC voltage ripple of a single-phase UPS. The input power of proposed UPS fluctuates with twice frequency of the utility source, which causes DC voltage fluctuation. The reduction of the DC voltage fluctuation requires a large DC link capacitor. The proposed method uses a LC series resonant filter paralleled with a conventional smoothing capacitor. The effectiveness of the proposed method was confirmed by simulation results.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.301-303
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• 2001

In this paper we present a Capacitor Charging Power Supply (CCPS) using a series-resonant three-level inverter topology to improve voltage regulation and use semiconductor switches having low blocking voltage capability such as MOSFETs. This inverter can be operated with two modes, Full Power Mode (FPM) and Half Power Mode (HPM). In FPM inverter supplies the high frequency step up transformer with full DC-link voltage and in HPM with half DC-link voltage. HPM switching method will be adopted when CCPS output voltage reaches the preset target value and operates in refresh mode-charge is maintained on the capacitor. In this topology each semiconductor devices blocks a half of the DC-link voltage[2]. A 15kW, 30kV CCPS has been built and will be tested for an electric precipitator application. The CCPS operates from an input voltage of 500VDC and has a variable output voltage between 10 to 30kV and 1kHz repetition rate at 44nF capacitive load [3]. A resonant frequency of 67.9kHz was selected and a voltage regulation of $0.83\%$ has been achieved through the use of half power mode without using the forced cut off the switch current [1]. The theory of operation, circuit topology and test results are given.

• Journal of Power Electronics
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• v.12 no.5
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• pp.739-747
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• 2012

This paper applies carrier phase shifted pulse-width modulation (CPS-PWM) to transformerless modular multilevel converters (MMC) to improve the output spectrum. Because the MMC topology is characterized by the double-star connection of six legs consisting of cascaded modular chopper cells with floating capacitors, the balance control of the DC-link capacitor voltage is essential for safe operation. This paper presents a leg-balancing control strategy to achieve DC-link voltage balance under all operating conditions. This strategy based on circulating current decoupling control focused on DC-link balancing between the upper and lower legs in each phase pair by considering the six legs as three independent phase-pairs. Experiments are implemented on a 100-V 3-kVA downscaled prototype. The experimental results show that the proposed leg-balancing control is both effective and practical.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.11a
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• pp.387-390
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• 2005

A This paper presents a novel three-phase current-fed Pulse Width Modulation converter with switched- capacitor type resonant DC link commutation circuit operating PWM pattern strategy under a design consideration of low-pass filter, which can operate on the basis of the principle of zero current soft-switching commutation. In the first place, the steady-state operating principle of this converter with a new resonant DC link snubber circuit is described in connection with the equivalent operation circuit, together with the practical design procedure of the switched-capacitor type resonant DC link circuit is discussed from a theoretical viewpoint on the basis of a design example for high-power applications. The actively delayed time correction method to compensate distorted currents due to a relatively long resonant commutation time is newly implemented in the open loop control scheme so as to acquire the new optimum PWM pattern. Finally, the experiment or set-up in laboratory system or this converter is concretely demonstrated herein to confirm a zero current soft-switching commutation of this converter. The comparative evaluations between current-fed hard switching PWM and soft-switching PWM converters are carried out from a viewpoint of their PWM converter characteristics.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.217-221
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• 2001

This paper presents a new prototype of soft-switching DC-DC power converter with a high frequency transformer link which has two active power controlled switches in full bridge rectifier with capacitor input type smoothing filter. In this DC-DC converter, ZVS of the inverter in transformer primary side and ZCS of active rectifier area in secondary side can be completely achieved by taking advantage of parasitic inductor component of high-frequency transformer and loss less snubbing capacitors. Its operation principle and salient features are described. The steady-state operating characteristics of the proposed DC-DC power converter are illustrated and discussed on the basis of the simulation results in addition to the experimental ones obtained by 2kw-40kHz power converter breadboard set up.

• The Transactions of the Korean Institute of Power Electronics
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• v.23 no.5
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• pp.359-365
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• 2018

This study introduces a model predictive control method for controlling a cascaded flying capacitor multilevel rectifier used as an AC-DC rectifier of a solid-state transformer for DC distribution systems. The proposed method reduces the number of states that need to be considered in model predictive control by separately controlling input current, output DC link voltage, and flying capacitor voltage. Thus, calculation time is shortened to facilitate the level expansion of the cascaded flying capacitor multilevel rectifier. The selection of weighting factors did not present difficulties because the weighting factors in the cost function of the conventional model predictive control are not used. The effectiveness of the proposed method is verified through computer simulation using powersim and experiment.

• The Transactions of the Korean Institute of Power Electronics
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• v.14 no.6
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• pp.449-456
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• 2009

The RMS(Root Mean Square) current stress reduction technique for the PFC link capacitor is proposed. Although the various parameter is exist for optimizing the link capacitor, the RMS current stress is the most weighty practical parameter. The proposed C-L filter can reduce effectively the RMS current stress by filtering the output current. And with the C-L-L-C filter proposed in this paper, the more RMS current stress can be reduce because it filters not only the output current, like C-L filter, but also the input current of DC/DC stage. The proposed filter is simple to design and have no effect on the control part of the PFC because of the very low crossover frequency. To confirm the validity of proposed filter, theoretical analysis, the design guide, verification of experimental results are presented.

• Proceedings of the KIEE Conference
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• 2008.07a
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• pp.879-880
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• 2008

At the high speed operation, the boost negative bias can reduce the negative torque and increase the dwell angle, so the output power and efficiency can be improved. In this paper, a novel power converter for single phase SRM with boost negative bias is proposed. A simple passive capacitor circuit is added in the front-end, which consists of three diodes and one capacitor. Based on this passive capacitor network, the two capacitors can be connected in series and parallel in different condition. In proposed converter, the phase winding of SRM obtains general dc-link voltage in excitation mode and the double dc-link voltage in demagnetization mode. The operation modes of the proposed converter are analyzed in detail. Some computer simulation and experimental results are done to verify the performance of proposed converter.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.4
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• pp.345-350
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• 2014

DC electrolytic capacitor is widely used in the power converter including PWM inverter, switching power supply and PFC Boost converter system because of its large capacitance, small size and low cost. In this paper, basic characteristics of DC electrolytic capacitor vs. frequency is presented and the real-time estimation scheme of ESR and capacitance based on the bandpass filtering is adopted to the single phase boost converter of uninterruptible power supply to diagnose its split dc-link capacitors. The feasibility of this real-time failure prediction monitoring system is verified by the computer simulation of the 5[kW] singe phase PFC half-bridge boost converter.

• Proceedings of the KIPE Conference
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• 2006.06a
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• pp.381-383
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• 2006

A novel online capacitance estimation method for a DC-link capacitor in a three-phase AC/DC/AC PWM converter is proposed. A controlled AC voltage with a lower frequency than the line frequency is Injected into the DC-link voltage, which then causes AC power ripples at the DC output side. By extracting the AC voltage and power components on the DC output side using digital filters, the capacitance can then be calculated using the recursive least squares method. The proposed method can be simply implemented with only software and no additional hardware. Experimental results confirm that the estimation error is less than 0.2%.