• 전력전자학회논문지
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• 제21권5호
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• pp.427-433
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• 2016

This paper proposes a new method for the current ripple reduction of a three-phase interleaved bidirectional DC-DC converter. Usually, the three-phase interleaved bidirectional DC-DC converter is used for battery charging and discharging to reduce battery current ripple. In V2G application, a PWM AC-DC converter is used to connect the AC power grid and three-phase interleaved bidirectional DC-DC converter for battery charging and discharging. The magnitude of DC link voltage affects the battery current ripple magnitude. Therefore, the magnitude of the battery ripple current is analyzed with variations of battery and DC link voltages. The ripple current magnitude is found to be minimized by controlling the DC link voltage. Simulation and experimental results show the usefulness of the proposed method.

• 전력전자학회논문지
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• 제18권1호
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• pp.110-116
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• 2013

This paper proposes a current ripple reduction method to improve the control performance of B4 type inverter that is studied for cost-effective drive systems. B4 inverters employ only four switches and they have a center-tapped connection between the split dc-link capacitors and one phase of a three-phase motor or load. In the B4 topology, unbalanced three-phase voltages will be generated due to the dc-link voltage ripple. To solve this problem, this paper presents a voltage distortion compensation method that adjusts the voltage reference with the consideration of dc-link voltage ripple. The validity of the proposed method is verified by simulation and excremental results with an induction machine.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제55권1호
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• pp.47-53
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• 2006

In this paper, a simple scheme compensating for the effect of dc-link ripple voltages on output voltage of two-leg and three-phase PWM inverters is proposed, where single-phase half-bridge PWM convertor and two-leg inverter are used. The voltage at neutral point of the dc-link is controlled so that the upper-half of do-link voltage is equal to the lower-half voltage in average concept. However, the effect of the do-link ripple voltage results in the inverter output voltage and current distortion. This effect can be eliminated by introducing a compensation voltage in switching time calculation. Also, the inverter dead time should be compensated for sinusoidal output waveform. The proposed scheme has been verified by experimental results which were obtained from the V/F constant operation of the induction motor fed by two-leg inverter.

• 한국기계가공학회지
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• 제12권4호
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• pp.16-21
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• 2013

This paper presents a DC link voltage control method to reduce the ripple current and the switching loss in the sinusoidal current drive system for the wide-speed range PMSM. The DC link voltage of the three phase inverter in the sinusoidal current drive system is designed by the back-EMF voltage at maximum speed of the PMSM. In general, the drive systems have used the constant DC link voltage without reference to the motor speed. The current ripple causes hysteresis loss and makes noise. In addition, the switching loss on the inverter increases in proportion to the rise in the DC link voltage. In this paper, we propose the variable DC link voltage control method to reduce the current ripple in the PMSM drive system. We show reduction effect of the current repple and the switching loss through simulation results.

• 전력전자학회논문지
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• 제18권1호
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• pp.91-102
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• 2013

This paper proposes the improved LCCT(Inductor-Capacitor-Capacitor-Trans) Z-source DC-DC converter (Improved LCCT ZSDC) which can generate the bipolar output voltages according to duty ratio D. The proposed converter has the characteristic and structure of Quasi Z-source DC-DC converter(Quasi ZSDC) and conventional LCCT Z-source DC-DC converter(LCCT ZSDC). To confirm the validity of the proposed method, PSIM simulation and a DSP based experiment were performed for each converter. In case which the input DC voltage is 70V, the bipolar output DC voltage of positive 90V and negative 50V could generate. Also, as comparison result of the capacitor voltage ripple in Z-network and the input current under the same condition for each converter, the voltage stress and the capacitor voltage in Z-network of the proposed method were lower compared with the conventional methods. Finally, the efficiency for each method was investigated according to load variation and duty ratio D.

• 한국정보전자통신기술학회논문지
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• 제9권6호
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• pp.553-558
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• 2016

본 논문은 바이오센서 칩에 사용하기 위해 3.3V CMOS 이미지 센서용 DC-DC 변환기 회로를 제안하였다. DC-DC 변환기 회로는 픽셀의 ON 전압인 PCP 전압과 OFF 전압인 NCP 전압으로 사용된다. 제안된 PCP 회로는 리플 전압이 45.35mV인 VPP (=5V) 양전하펌프 전압을 전압 레귤레이터를 이용하여 리플전압이 1.33mV 이내인 PCP 전압을 얻었다. 그리고 제안된 NCP 회로는 리플 전압이 62.8mV VNN (=-2V) 음전하펌프 전압을 전압 레귤레이터를 이용하여 리플전압을 0.05mV 이내로 설계하였다.

• Journal of Power Electronics
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• 제19권6호
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• pp.1351-1365
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• 2019

This paper proposes two modified Z-source inverter topologies, namely an embedded L-Z-source inverter (EL-ZSI) and a coupled inductor L-Z source inverter (CL-ZSI). The proposed topologies offer a high voltage gain with a reduced passive component count and reduction in source current ripple when compared to conventional ZSI topologies. Additionally, they prevent overshoot in the dc-link voltage by suppressing heavy inrush currents. This feature reduces the transition time to reach the peak value of the dc-link voltage, and reduces the risk of component failure and overrating due to the inrush current. EL-ZSI and CL-ZSI possess all of the inherent advantages of the conventional L-ZSI topology while eliminating its drawbacks. To verify the effectiveness of the proposed topologies, MATLAB/Simulink models and scaled down laboratory prototypes were constructed. Experiments were performed at a low shoot through duty ratio of 0.1 and a modulation index as high as 0.9 to obtain a peak dc-link voltage of 53 V. This paper demonstrates the superiority of the proposed topologies over conventional ZSI topologies through a detailed comparative analysis. Moreover, experimental results verify that the proposed topologies would be advantageous for renewable energy source applications since they provide voltage gain enhancement, inrush current, dc-link voltage overshoot suppression and a reduction of the peak to peak source current ripple.

• 전력전자학회논문지
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• 제25권2호
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• pp.73-78
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• 2020

In this study, a novel reactive power control scheme is proposed to supply stable reactive power to the distribution line by compensating a ripple voltage of DC link. In a single-phase system, a magnitude of second harmonic is inevitably generated in the DC link voltage, and this phenomenon is further increased when the capacity of DC link capacitor decreases. Reactive power control was performed by controlling the d-axis current in the virtual synchronous reference frame, and the voltage control for maintaining the DC link voltage was implemented through the q-axis current control. The proposed method for compensating the ripple voltage was classified into three parts, which consist of the extraction unit of DC link voltage, high pass filter (HPF), and time delay unit. HPF removes an offset component of DC link voltage extracted from integral, and a time delay unit compensates the phase leading effect due to the HPF. The compensated DC voltage is used as feedback component of voltage control loop to supply stable reactive power. The performance of the proposed algorithm was verified through simulation and experiments. At DC link capacitance of 375 uF, the magnitude of ripple voltage decreased to 8 Vpp from 74 Vpp in the voltage control loop, and the total harmonic distortion of the current was improved.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권1호
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• pp.1-8
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• 2005

This paper presents a characteristic analysis of switched reluctance motor (SRM) considering switching control method and DC link voltage ripple by using time-stepped voltage source finite element method in which the magnetic field is combined with drive circuit. We also examine the influence of freewheeling diodes and DC link voltage ripple on the performance of the SRM such as torque ripples and radial force on the surface of the teeth. The freewheeling diodes and DC link voltage ripples must be taken into account to predict the performance of SRM.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 B
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• pp.872-874
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• 2004

This paper presents a charcteristcic analysis switched reluctance motor (SRM) considering hard chopping and DC link voltage ripple by using time-stepped voltage source finite element method in which the magnetic field is combined with drive circuit. We also examine the influence of freewheeling diodes and DC link voltage ripple on the performance of the SRM such as torque ripples and radial force on the surface of the teeth The freewheeling diodes and DC link voltage ripples must be taken into account in predicted the performance of SRM