• 제목/요약/키워드: DC voltage optimization

검색결과 70건 처리시간 0.022초

전해 방전법을 이용한 유리 미세 구멍가공 (Micro-hole Fabrication of Glass Using Electro-chemical Discharge Method)

  • 이왕훈;이영태
    • 센서학회지
    • /
    • 제13권1호
    • /
    • pp.72-77
    • /
    • 2004
  • In this paper, we fabricated an apparatus of the electro-chemical discharge drilling for boring narrow through-hole into a glass. In the electrolyte, electro-chemical discharge creates high temperature condition by the electro-discharge energy. Therefore, glass are removed by the accelerated chemical reaction with glasses and chemicals in the high temperature condition. For optimization of the electro-chemical discharge drilling, the process condition was studied experimentally as a function of the electrolyte concentration, supply voltage and process time. The optimum condition was from DC25V to DC30V of applied voltage, 35 wt% NaOH solution.

전원 임피던스 제어를 통한 도시철도 최대전력 최적화 (Peak Power Optimization for Metro Railway using by Source Impedance Control)

  • 김한수;권오규
    • 전기학회논문지
    • /
    • 제63권6호
    • /
    • pp.841-849
    • /
    • 2014
  • Urban railway with rectifiers is connected by parallel circuits because substations are joined by the power rail. Thus, if an input voltage of a substation is increased, then the voltage of rectifiers is also increased, and which leads to an increase in the peak power of the substation. To solve this problem, this paper proposes a new method reducing the peak power of substations by adjusting the operation number of rectifiers. Its feasibility is exemplified by some simulations performed for Incheon subway Line 1 and GA(Genetic Algorithm) method has been applied to obtain the optimal input. Simulation results show that peak power can significantly be reduced using the method proposed in this paper.

ADN Gate PDP의 DC 방전셀 방전특성 최적화 (Optimization on the Characteristics of DC Discharge Cell in the AND Gate PDPs)

  • 염정덕
    • 조명전기설비학회논문지
    • /
    • 제18권3호
    • /
    • pp.34-39
    • /
    • 2004
  • 본 연구에서는 새로 고안된 AND gate PDP의 AND gate를 구성하는 4개의 DC 방전셀에 대한 상호간의 영향을 방전특성 측면에서 규명하였다. 이 4개의 방전셀들의 방전개시 전압은 인접한 방전셀의 방전에서 발생하는 공간전하와 깊은 관련이 있다는 것을 알았다. 실험 결과 각 방전셀의 최적화된 방전 전압을 결정할 수 있었으며 PDP의 address 방전에 이용되는 floating 방전을 도와주는 priming 방전의 동작마진을 얻기가 어렵다는 것을 정석적으로 알 수 있었다.

End-to-end system level modeling and simulation for medium-voltage DC electric ship power systems

  • Zhu, Wanlu;Shi, Jian;Abdelwahed, Sherif
    • International Journal of Naval Architecture and Ocean Engineering
    • /
    • 제10권1호
    • /
    • pp.37-47
    • /
    • 2018
  • Dynamic simulation is critical for electrical ship studies as it obtains the necessary information to capture and characterize system performance over the range of system operations and dynamic events such as disturbances or contingencies. However, modeling and simulation of the interactive electrical and mechanical dynamics involves setting up and solving system equations in time-domain that is typically time consuming and computationally expensive. Accurate assessment of system dynamic behaviors of interest without excessive computational overhead has become a serious concern and challenge for practical application of electrical ship design, analysis, optimization and control. This paper aims to develop a systematic approach to classify the sophisticated dynamic phenomenon encountered in electrical ship modeling and simulation practices based on the design intention and the time scale of interest. Then a novel, comprehensive, coherent, and end-to-end mathematical modeling and simulation approach has been developed for the latest Medium Voltage Direct Current (MVDC) Shipboard Power System (SPS) with the objective to effectively and efficiently capture the system behavior for ship-wide system-level studies. The accuracy and computation efficiency of the proposed approach has been evaluated and validated within the time frame of interest in the cast studies. The significance and the potential application of the proposed modeling and simulation approach are also discussed.

직류도시철도 시스템에서 저장장치 단위 용량 당 에너지 절감 효과 분석 연구 (Efficiency Improvement Effect Analysis for Marginal Storage Capacity in DC Electric Railway Systems)

  • 이한상;윤동희;김형철;주성관;정호성
    • 전기학회논문지
    • /
    • 제63권8호
    • /
    • pp.1159-1163
    • /
    • 2014
  • This paper have been dealt with the analysis for energy efficiency improvement effect of unity storage capacity as a part of the energy storage application study to improve energy efficiency in the electric railway systems. Especially, in order to estimate the amount of energy saving according to the variation of power capacity of each storage, the current limit module was mounted on an existing DC electric railway loadflow program which is based on the analysis model for railway system and storages, and combined optimization algorithm to determine optimal voltage boundary.

줄기세포재생 치료를 위한 배지의 전압 반응 실험 (Experiment of Response with Voltage for Stem Cell Regeneration Treatment)

  • 윤기철;김정태;김범수;이준;이종철
    • 한국통신학회논문지
    • /
    • 제41권7호
    • /
    • pp.809-815
    • /
    • 2016
  • 본 논문은 줄기세포 재생 치료를 위해 사용되는 배지에 직류전압을 인가하여 배지에 반응되는 전기적인 저항 값, 전류 값 그리고 전압 값의 상태에 대해 분석하였다. 배지에 반응되는 전압은 줄기세포 분화 유도 과정에서 전기적인 자극에 연관되며 반응 전압 상태에 따라 분화의 상태에 대해 확인 할 수 있다. 배지의 반응 전압에서 전압변화 레벨이 적으면 줄기세포 자극 조건이 안정적이며 만일 전압 변화 레벨이 심하면 줄기세포 자극 조건이 불안정하여 줄기세포 분화 과정에서 상당한 손실을 따르게 될 수 있다. 본 연구는 줄기세포 재생 치료의 가능성을 위해 전기적인 자극 조건의 최적화 하는데 도움이 될 것으로 기대한다.

Harmonic Elimination and Optimization of Stepped Voltage of Multilevel Inverter by Bacterial Foraging Algorithm

  • Salehi, Reza;Vahidi, Behrooz;Farokhnia, Naeem;Abedi, Mehrdad
    • Journal of Electrical Engineering and Technology
    • /
    • 제5권4호
    • /
    • pp.545-551
    • /
    • 2010
  • A new family of DC to AC converters, referred to as multilevel inverter, has received much attention from industries and researchers for its high power and voltage applications. One of the conventional techniques for implementing the switching algorithm in these inverters is optimized harmonic stepped waveform (OHSW). However, the major problem in using this technique is eliminating low order harmonics by solving the nonlinear and complex equations. In this paper, a new approach called the "bacterial foraging algorithm" (BFA) is employed. This algorithm eliminates and optimizes the harmonics in a multilevel inverter. This method has higher speed, precision, and convergence power compared with the genetic algorithm (GA), a famous evolutionary algorithm. The proposed technique can be expanded in any number of levels. The purpose of optimization is to remove some low order harmonics, as well as to ensure the fundamental harmonic retained at the desired value. As a case study, a 13-level inverter is chosen. The comparison results by MATLAB software between the two optimization methods (BFA and GA) have shown the effectiveness and superiority of BFA over GA where convergence is desired to achieve global optimum.

Optimal Design for Hybrid Active Power Filter Using Particle Swarm Optimization

  • Alloui, Nada;Fetha, Cherif
    • Transactions on Electrical and Electronic Materials
    • /
    • 제18권3호
    • /
    • pp.129-135
    • /
    • 2017
  • This paper introduces a design and a simulation of a hybrid active power filter (HAPF) for harmonics reduction given an ideal supply source. The synchronous reference frame method has been used here to identify the reference currents. The proposed HAPF uses a new artificial- intelligence technique called Particle Swarm Optimization (PSO) for tuning the parameters of a proportional and integral controller called PI-PSO. The PI-PSO controller is used to archive optimality for the DC-link voltage of the HAPF-inverter. The hysteresis non-linear current control method is used in this approach to compare the extracted reference and the actual currents in order to generate the pulse gate required for the HAPF. Results obtained by simulations with Matlab/Simuling show that the proposed approach is very flexible and effective for eliminating harmonic currents generated by the non-linear load with the HAPF based PSO tuning.

Control and Analysis of an Integrated Bidirectional DC/AC and DC/DC Converters for Plug-In Hybrid Electric Vehicle Applications

  • Hegazy, Omar;Van Mierlo, Joeri;Lataire, Philippe
    • Journal of Power Electronics
    • /
    • 제11권4호
    • /
    • pp.408-417
    • /
    • 2011
  • The plug-in hybrid electric vehicles (PHEVs) are specialized hybrid electric vehicles that have the potential to obtain enough energy for average daily commuting from batteries. The PHEV battery would be recharged from the power grid at home or at work and would thus allow for a reduction in the overall fuel consumption. This paper proposes an integrated power electronics interface for PHEVs, which consists of a novel Eight-Switch Inverter (ESI) and an interleaved DC/DC converter, in order to reduce the cost, the mass and the size of the power electronics unit (PEU) with high performance at any operating mode. In the proposed configuration, a novel Eight-Switch Inverter (ESI) is able to function as a bidirectional single-phase AC/DC battery charger/ vehicle to grid (V2G) and to transfer electrical energy between the DC-link (connected to the battery) and the electric traction system as DC/AC inverter. In addition, a bidirectional-interleaved DC/DC converter with dual-loop controller is proposed for interfacing the ESI to a low-voltage battery pack in order to minimize the ripple of the battery current and to improve the efficiency of the DC system with lower inductor size. To validate the performance of the proposed configuration, the indirect field-oriented control (IFOC) based on particle swarm optimization (PSO) is proposed to optimize the efficiency of the AC drive system in PHEVs. The maximum efficiency of the motor is obtained by the evaluation of optimal rotor flux at any operating point, where the PSO is applied to evaluate the optimal flux. Moreover, an improved AC/DC controller based Proportional-Resonant Control (PRC) is proposed in order to reduce the THD of the input current in charger/V2G modes. The proposed configuration is analyzed and its performance is validated using simulated results obtained in MATLAB/ SIMULINK. Furthermore, it is experimentally validated with results obtained from the prototypes that have been developed and built in the laboratory based on TMS320F2808 DSP.

전압 표준용 RSFQ counter회로의 설계 (Circuit design of an RSFQ counter for voltage standard applications)

  • 남두우;김규태;김진영;강준희
    • 한국초전도저온공학회:학술대회논문집
    • /
    • 한국초전도저온공학회 2003년도 추계학술대회 논문집
    • /
    • pp.127-130
    • /
    • 2003
  • An RSFQ (Rapid Single Flux Quantum) counter can be used as a frequency divider that was an essential part of a programmable voltage standard chip. The voltage standard chip is composed of two circuit parts, a counter and an antenna Analog signal of tens to hundreds ㎓ may be applied to a finline antenna part. This analog signal can be converted to the stream of SFQ voltage pulses by a DC/SFQ circuit. The number of voltage pulses can be reduced by 2n times when they pass through a counter that is composed of n T Flip-Flops (Toggle Flip-Flop). Such a counter can be used not only as a frequency divider, but also to build a programmable voltage standard chip. So, its application range can be telecommunication, high speed RAM, microprocessor, etc. In this work, we have used Xic, WRspice, and L-meter to design an RSFQ counter. After circuit optimization, we could obtain the bias current margins of the T Flip-Flop circuit to be above 31% Our RSFQ counter circuit designs were based on the 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology.

  • PDF