• 제목/요약/키워드: DC bias voltage

검색결과 274건 처리시간 0.023초

전압-제어 CMOS OTA와 이를 이용한 동조 여파기 설계 (A Design of Voltage-Controlled CMOS OTA and Its Application to Tunable Filters)

  • 차형우;정원섭
    • 대한전자공학회논문지
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    • 제27권8호
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    • pp.1260-1264
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    • 1990
  • A voltage controlled CMOS operational transconductance amplifier (OTA), whose transconductance is directly proportional to the DC bias voltage, has been designed for many electronic circuit applications. It consists of a differential pair and three ourrent mirrors. The SPICE simulation shows that the conversion sensitivity of the OTA is 41.817 \ulcornerho/V and the linearity error is less than 0.402% over a bias voltage range from -2. OV to 1. OV. Electrically tunalble filters based on voltage controlled impedances, which are realized with OTA's, also have been designed. The SPICE simulation shows that a second-order bandpass filter, whose center frequency is 23KHz at -1. OV, has the conversion sensitivity 6.6KHz/V and the linearity error less than 0.822% over a voltage range from -2.OV tp 1.OV, Tne OTA has been laid out with the 3\ulcorner n-well CMOS design rule adopted in ISRC (inter-university semiconductor research center). The chip size was about $0.756x0.945mm^2$.

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Current-voltage Characteristics of Ceramics with Positive Temperature Coefficient of Resistance

  • Li, Yong-Gen;Cho, Sung-Gurl
    • 한국세라믹학회지
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    • 제40권10호
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    • pp.921-924
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    • 2003
  • A current-voltage relation for Positive Temperature Coefficient of Resistance (PTCR) ceramic was derived and compared with the experimental data. The new current-voltage relation was developed based on Heywangs double Schottky barrier model and a bias distribution across the grain boundary. The voltage limitation V < 4${\Phi}$$\sub$b/ suggested by Heywang is no longer necessary in the new expression for the voltage dependence of the resistance. The pulsed voltages were applied to the PTCR ceramic specimen in order to avoid possible temperature variation during the measurement.

Design of an EEPROM for a MCU with the Wide Voltage Range

  • Kim, Du-Hwi;Jang, Ji-Hye;Jin, Liyan;Ha, Pan-Bong;Kim, Young-Hee
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제10권4호
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    • pp.316-324
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    • 2010
  • In this paper, we design a 256 kbits EEPROM for a MCU (Microcontroller unit) with the wide voltage range of 1.8 V to 5.5 V. The memory space of the EEPROM is separated into a program and data region. An option memory region is added for storing user IDs, serial numbers and so forth. By making HPWs (High-voltage P-wells) of EEPROM cell arrays with the same bias voltages in accordance with the operation modes shared in a double word unit, we can reduce the HPW-to-HPW space by a half and hence the area of the EEPROM cell arrays by 9.1 percent. Also, we propose a page buffer circuit reducing a test time, and a write-verify-read mode securing a reliability of the EEPROM. Furthermore, we propose a DC-DC converter that can be applied to a MCU with the wide voltage range. Finally, we come up with a method of obtaining the oscillation period of a charge pump. The layout size of the designed 256 kbits EEPROM IP with MagnaChip's 0.18 ${\mu}m$ EEPROM process is $1581.55{\mu}m{\times}792.00{\mu}m$.

전압 변화에 따른 테라헤르츠 전자기 펄스의 변화 특성 (The Characteristics of Terahertz Electromagnetic Pulses by Different Bias Voltage)

  • 전태인;김근주
    • 한국정보통신학회:학술대회논문집
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    • 한국해양정보통신학회 2001년도 춘계종합학술대회
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    • pp.479-482
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    • 2001
  • 본 연구는 DC 전압에 따른 테라헤르츠 전자기 펄스의 변화를 측정하였다. 펨토초(femto-second)로 여기 되는 레이저 펄스를 transmitter chip에 입사시키고, 두 개의 transmission line에 DC 전압을 최소 5 Volt에서 최대 90 Volt 까지 변화시켜 테라헤르츠 전자기 펄스의 크기와 스팩트럼의 변화를 관찰하였다. 전압이 증가할수록 상대적으로 스펙트럼의 크기가 고주파 쪽으로 증가되었으며, 신호 대 잡음비(SNR) 역시 250:1에서 10,000:1로 개선 할 수 있음을 알 수 있었다.

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Simulations of Capacitively Coupled Plasmas Between Unequal-sized Powered and Grounded Electrodes Using One- and Two-dimensional Fluid Models

  • So, Soon-Youl
    • KIEE International Transactions on Electrophysics and Applications
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    • 제4C권5호
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    • pp.220-229
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    • 2004
  • We have examined a technique of one-dimensional (1D) fluid modeling for radio-frequency Ar capacitively coupled plasmas (CCP) between unequal-sized powered and grounded electrodes. In order to simulate a practical CCP reactor configuration with a grounded side wall by the 1D model, it has been assumed that the discharge space has a conic frustum shape; the grounded electrode is larger than the powered one and the discharge space expands with the distance from the powered electrode. In this paper, we focus on how much a 1D model can approximate a 2D model and evaluate their comparisons. The plasma density calculated by the 1D model has been compared with that by a two-dimensional (2D) fluid model, and a qualitative agreement between them has been obtained. In addition, 1D and 2D calculation results for another reactor configuration with equal-sized electrodes have also been presented together for comparison. In the discussion, four CCP models, which are 1D and 2D models with symmetric and asymmetric geometries, are compared with each other and the DC self-bias voltage has been focused on as a characteristic property that reflects the unequal electrode surface areas. Reactor configuration and experimental parameters, which the self-bias depends on, have been investigated to develop the ID modeling for reactor geometry with unequal-sized electrodes.

Grid-friendly Control Strategy with Dual Primary-Side Series-Connected Winding Transformers

  • Shang, Jing;Nian, Xiaohong;Chen, Tao;Ma, Zhenyu
    • Journal of Power Electronics
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    • 제16권3호
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    • pp.960-969
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    • 2016
  • High-power three-level voltage-source converters are widely utilized in high-performance AC drive systems. In several ultra-power instances, the harmonics on the grid side should be reduced through multiple rectifications. A combined harmonic elimination method that includes a dual primary-side series-connected winding transformer and selective harmonic elimination pulse-width modulation is proposed to eliminate low-order current harmonics on the primary and secondary sides of transformers. Through an analysis of the harmonic influence caused by dead time and DC magnetic bias, a synthetic compensation control strategy is presented to minimize the grid-side harmonics in the dual primary side series-connected winding transformer application. Both simulation and experimental results demonstrate that the proposed control strategy can significantly reduce the converter input current harmonics and eliminates the DC magnetic bias in the transformer.

RF Bias Effect of ITO Thin Films Reactively Sputtered on PET Substrates at Room Temperature

  • Kim, Hyun-Hoo;Shin, Sung-Ho
    • Transactions on Electrical and Electronic Materials
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    • 제5권3호
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    • pp.122-125
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    • 2004
  • ITO films were deposited on polyethylene terephthalate substrate by a dc reactive magnetron sputtering using rf bias without substrate heater and post-deposition thermal treatment. The dependency of rf substrate bias on plasma sputter processing was investigated to control energetic particles and improve ITO film properties. The substrate was applied negative rf bias voltage from 0 to -80 V. The composition of indium, tin, and oxygen atoms is strongly depended on the rf substrate bias. Oxygen deficiency is the highest at rf bias of -20 V. The electrical and optical properties of ITO films also are dominated obviously by negative rf bias.

LiINbO3 기판의 분극반전을 이용한 5.5 GHz 대역 SSB 광변조기의 설계 및 제작 (Design and Fabrication of 5.5GHZ SSB optical modulator with polarization reversed structure)

  • 정우진;김우경;양우석;이형만;이한영;권순우
    • 한국광학회지
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    • 제17권2호
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    • pp.175-180
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    • 2006
  • 리튬나이오베이트 기판의 분극 반전 기술을 이용하여 5.5 GHz대역의 SSB(Single Sideband) 광변조기를 설계 및 제작하였다. 분극 반전을 통해 광이 인가받는 유효전계가 마흐젠더 두 도파로에서 $90^{\circ}$ 위상차를 갖도록 할 수 있었다. 제작된 광변조기는 5.8 GHz의 중심주파수로, 1.9 V DC 인가 시 약 33 dB의 USB 억제율을, -10.6 V 인가 시 약 25 dB의 LSB 억제율을 나타내었다. 또한 2.5 GHz의 대역폭에서 15 dB 이하의 Sideband 억제율을 보이고 있다.

IBAD-MgO 기판상에 플라즈마를 이용한 LaMnO3 저온 증착 (Low temperature deposition of LaMnO3 on IBAD-MgO template assisted by plasma)

  • 김호섭;오상수;하동우;하홍수;고락길;문승현
    • 한국초전도ㆍ저온공학회논문지
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    • 제14권1호
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    • pp.1-3
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    • 2012
  • LMO($LaMnO_3$) buffer layer of superconducting coated conductor was deposited on IBAD-MgO template in the plasma atmosphere at $650^{\circ}C$ which is relatively low compared with conventional deposition temperature of more than $800^{\circ}C$. Deposition method of LMO was DC sputtering, and target and deposition chamber were connected to the cathode and anode respectively. When DC voltage was applied between target and chamber, plasma was formed on the surface of target. The tape substrate was located with the distance of 10 cm between target and tape substrate. When anode bias was connected to the tape substrate, electrons were attracted from plasma in target surface to the tape substrate, and only tape substrate was heated by electron bombardment without heating any other zone. The effect of electron bombardment on the surface of substrate was investigated by increasing bias voltage to the substrate. We found out that the sample of electron bombardment had the effect of surface heating and had good texturing at low controlling temperature.

글로우방전 질량분석법을 이용한 구리 박막내의 미량불순물 분석: 음의 기판 바이어스에 의한 불순물원소의 농도변화 (Trace impurity analysis of Cu films using GDMS: concentration change of impurities by applying negative substrate bias voltage)

  • 임재원
    • 한국진공학회지
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    • 제14권1호
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    • pp.17-23
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    • 2005
  • 본 논문은 글로우방전 질량분석법(Glow Discharge Mass Spectrometry: GDMS)을 이용하여 구리 박막내의 미량 불순물의 농도분석과 음의 기판 바이어스에 대한 구리 박막내의 불순물의 농도변화에 대해서 고찰하였다. 구리 박막은 실리콘 기판 위에 비질량 분리형 이온빔 증착장비를 이용하여 기판 바이어스를 걸지 않은 경우와 -50 V의 기판 바이어스를 걸은 상태에서 증착하였다. 전기를 통하지 않는 분석 샘플의 경우, 직류(DC) GDMS에 의한 분석시, 샘플 표면에서의 charge-up 효과에 의해 분석에 어려움이 있었지만, 본 실험에서는 간편하게 분석이 가능하도록 샘플을 알루미늄 포일(foil)로 감싸서 구리 박막으로부터 실리콘 기판 뒤의 샘플 홀더까지 전기적 접촉이 이루어지도록 하였다. 구리 타겟과 증착된 구리 박막들에 대한 GDMS 분석결과에 의해서, 전체적으로 박막내의 불순물의 양이 음의 기판 바이어스에 의해 줄어듦으로써 구리 박막의 전체 순도를 높일 수 있다는 것을 알게 되었다. 음의 기판 바이어스에 의한 불순물들의 농도변화는 각각의 불순물의 이온화 포텐셜의 차이에 의한 것으로, 박막 증착시 플라즈마내의 Penning ionization effect와 본 논문에서 제시한 이온화 과정에 의해 각 불순물의 농도변화가 설명되어질 수 있었다. 또한, 기판 위에서의 구리 이온들의 충격에 의한 cleaning effect도 박막내의 불순물의 농도변화에 기여했다고 판단된다.