• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.4
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• pp.659-666
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• 2006

Servo-motors are used as key components of automated system by performing precise motion control as accurate positioning and accurate speed regulation in response to the commands from computers and sensors. Especially, the linear brushless servo-motors have numerous advantages over the rotary servo motors which have connection with the friction induced transfer mechanism such as ball screws, timing belts, rack/pinion. This paper proposes an estimation method of unknown motor system parameters using the informations from the sinusoidal driving type linear brushless DC motor dynamics and outputs. The estimated parameters can be used to tune the controller gain and a disturbance observer. In order to meet this purpose high performance Digital Signal Processor, TMS320F240, designed originally for implementation of a Field Oriented Control(FOC) technology is adopted as a controller of the liner BLDC servo motor. Having A/D converters, PWM generators, rich I/O port internally, this servo motor application specific DSP play an important role in servo motor controller. This linear BLDC servo motor system also contains IPM(Intelligent Power Module) driver and hail sensor type current sensor module, photocoupler module for isolation of gate signals and fault signals.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.12
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• pp.1380-1393
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• 2010

This paper presents a design, fabrication and the test results of planar active electronically scanned array(AESA) radar prototype for airborne fighter applications using transmit/receive(T/R) module hybrid technology. LIG Nex1 developed a AESA radar prototype to obtain key technologies for airborne fighter's radar. The AESA radar prototype consists of a radiating array, T/R modules, a RF manifold, distributed power supplies, beam controllers, compact receivers with ADC(Analog-to-Digital Converter), a liquid-cooling unit, and an appropriate structure. The AESA antenna has a 590 mm-diameter, active-element area capable of containing 536 T/R modules. Each module is located to provide a triangle grid with $14.7\;mm{\times}19.5\;mm$ spacing among T/R modules. The array dissipates 1,554 watts, with a DC input of 2,310 watts when operated at the maximum transmit duty factor. The AESA radar prototype was tested on near-field chamber and the results become equal in expected beam pattern, providing the accurate and flexible control of antenna beam steering and beam shaping.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.6
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• pp.670-680
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• 2010

A low power single-chip CMOS receiver for 60 GHz mobile application are proposed in this paper. The single-chip receiver consists of a 4-stage current re-use LNA with under 4 dB NF, Cgs compensating resistive mixer with -9.4 dB conversion gain, Ka-band low phase noise VCO with -113 dBc/Hz phase noise at 1 MHz offset from 26.89 GHz, high-suppression frequency doubler with -0.45 dB conversion gain, and 2-stage current re-use drive amplifier. The size of the fabricated receiver using a standard 0.13 ${\mu}m$ CMOS technology is 2.67 mm$\times$0.75 mm including probing pads. An RF bandwidth is 6.2 GHz, from 55 to 61.2 GHz and an LO tuning range is 7.14 GHz, from 48.45 GHz to 55.59 GHz. The If bandwidth is 5.25 GHz(4.75~10 GHz) The conversion gain and input P1 dB are -9.5 dB and -12.5 dBm, respectively, at RF frequency of 59 GHz. The proposed single-chip receiver describes very good noise performances and linearity with very low DC power consumption of only 21.9 mW.