• 한국의상디자인학회지
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• 제14권4호
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• pp.89-98
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• 2012

The purpose of this study is to female child Han-bok reform design for body growth. Nowadays there is common the western style daily life and special day instead of traditional style Han-bok in Korea. So the decrease in the use of Han-bok have being appeared. Specially, Children's Han-bok undesirable clothes for economic, environment, and resources because of their rapid growth and changing trend. Therefor, they do away with used Han-bok without next buying of school age. Children's parents and children are decision together purchase of children's Han-bok on-line for pleasure and economic reasons on pre-school or 1st year student for their tradition-education class. After 2000year, children's Han-bok pup-up on e-market because of the fashion focus on tradition and Korean wave for parody of Korean drama. Flowing the Research of 2010 Size Korea, the elementary school age child height growth 6cm per year, the sleeve length are 3cm growth. But Chi-ma(a pice of Han-bok) from e-market, has only 5cm margin on shoulder and no margin on Jegori(a pice of Han-bok) shoulder and sleeve, reason of that the children can't wear next year. Therefor this study is development female child Han-bok reform design for body growth, for extend to wear Han-bok on school age children and flow tradition custom of Cho-sun Dynasty's clothing custom for boost tradition conscious and reduce of cloth waste for environment.

• 한국통신학회논문지
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• 제26권3B호
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• pp.362-368
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• 2001

본 논문에서는 두 개의 17비트 오퍼랜드를 radix-4 Booths 알고리즘을 이용하여 곱셈 연산을 수행하는 곱셈기를 설계하고 효율적인 풀커스팀 디자인에 대한 테스트 방법을 제안하였다. 클럭 속도를 빠르게 하기 위하여 2단파이프라인 구조로 설계하고 규칙적인 레이아웃을 위해 4:2 CSA(Carry Save Adder)를 사용하였다. 회로는 LG 반도체의 0.6-um 3-Metal N-well CMOS 공정을 사용하여 칩으로 제작되었다. 새로운 개념의 모듈레벨 고착 고장 모델을 제안하였고 제안한 테스트 방법을 사용하여 관찰해야 하는 노드의 수를 약 88% 줄여 효율적인 고장 시뮬레이션을 수행하였다. 설계된 곱셈기는 9115개의 트랜지스터로 구성되며 코어 부분의 레이아웃 면적은 약 1135*1545 um2 이다. 제작된 칩은 전원접압 5V에서 약 24MHz의 클럭 주파수로 동작한다.

• 패션비즈니스
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• 제7권3호
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• pp.1-13
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• 2003

As a ritual that deals with the issues of human life and death, and that embodies complicated cultural implications, funerals have been an important material to refer to in considering the spiritual life as well as the social aspects of contemporary people. The present study on the 19th-century Western funerals is significant in that current funerals have been formed and changed from the ancient practice in a long historical background. The funeral patterns in 1890 to 1910, the period when reformatory movements started to appear in the custom concerning death, have been changed and fixed to be the current funeral custom. The range of the present study is limited to the characteristics of enbalmment, funeral processions and ceremonies, as well as the costumes for the mourning period. The research method employed in the study is the review of literature concerning death and funeral rituals, previous studies, domestic and international technical literature, and photographs or paintings.

• 한국정보처리학회:학술대회논문집
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• 한국정보처리학회 2014년도 추계학술발표대회
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• pp.53-56
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• 2014

Application specific instruction-set processor (ASIP) is a suitable design choice for system designers who seek both flexibility to handle various applications in the domain together with the performance. Successful development of an ASIP, however, requires a software development kit (SDK) to be provided along with the processor. Synopsys Processor Designer is an ASIP development tool, which takes as input a set of files written in a high-level architecture description language called LISA (Language for Instruction Set Architecture), and generates SDK as well as RTL. Recently, they have added support for the generation of LLVM compiler backend, though some manual work is required. In this paper, we introduce some details in porting LLVM compiler to a custom processor architecture in Synopsys Processor Designer.

• 패션비즈니스
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• 제16권3호
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• pp.78-94
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• 2012

This study devised and drew custom sleeve patterns by using a regression equation with the data from 7 models along with the sleeve that was slightly modified to make the general-purpose sleeve pattern. To devise a general-purpose sleeve pattern, the sleeve pattern was drawn as an object for comparison by applying the Bunka drafting system (sleeve pattern by the Bunka drafting system) to the basic upper garment. Actual sleeves, made by using the three types of patterns above, were created and tested by models. Next, 30 panel members participated in a sight test of the compatibility of the sleeves to examine the validity of the sleeve drafting method acquired using the regression equation. The test proved that the custom sleeve pattern and the general-purpose sleeve pattern were more suitable for the characteristics of arm structures. Thus, the new sleeve-cap part drafting method using the regression equation was shown to have validity. As a result, since a very significant correlation was obtained for the body measurement figures and the basic pattern of the adequate basic pattern of the sleeves, this study concludes that it is possible to come up with primary data that can be widely used by increasing the number of subjects.

• 한국CDE학회논문집
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• 제4권4호
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• pp.339-349
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• 1999

The punose of this paper is to introduce the comprehensive CAM system (called PosCAM) supporting various function requested from shop floor operators. PosCAM is comported of two subsystems (PosCAM I and PosCAM II) which are designed to make up for the contemporary CAD/CAM systems. PosCAM I is mainly for : a) verifying the part programs written in both custom macros and standard G-codes, b) enhancing machining productivity and quality with built-in cutting conditions and feedrate optimization algorithm. PosCAM II is for : a) efficiently managing the numerous part programs and tool data stored in CNC memory, and b) integratively controlling and monitoring various CNCs from the control center through RS-422 with DNC 2 protocol. The developed systems have been tested via various experiments, and can be Applied for the industrial CNC machine shop as a means for enhancing productivity. The PosCAM system has been implemented and successfully used in the Machine Shop Department of PosCAM since march 1998.

• 전기학회논문지
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• 제58권7호
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• pp.1418-1423
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• 2009

This paper describes the design and implementation of a System-on-a-Chip (SoC) for image processing applications to use in wearable/mobile products. The target Soc consists of LEON 2 core, AMBA/APB bus-systems and custom-designed controllers. A new FPGA-based prototyping platform is implemented and used for design and verification of the target SoC. To ensure that the implemented SoC satisfies the required performances, an image processing application is performed.

• 한국복식학회:학술대회논문집
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• 한국복식학회 2003년도 International Costume Conference
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• pp.52-52
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• 2003

As clothing, fashion is changed by life circumstance, reform of social custom, condition of economy, inner or outside every accident and complicately psychologic a main cause work. But definite and great accident like revolution or War is originated. The War effect in clothing, eating, housing life, specially social culture affect social culture have an affect.

• 구강회복응용과학지
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• 제34권3호
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• pp.157-166
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• 2018

목적: 두 가지 CAD software에서 각 software의 맞춤형 지대주 디자인과 출력물의 일치도를 비교 평가한다. 연구 재료 및 방법: 3Shape Dental System과Delta9 CAD 소프트웨어를 이용하여 임플란트 식립 석고모델에 맞춤형 지대주를 디자인하였다(CRM STL file).디자인한 지대주를 밀링 한 후, 접촉식 방식으로 스캔하고(Test STL file), Inspection 소프트웨어에서 각 지대주의 Test STL file과 CRM STL file을 중첩하여 오차값을 측정하였다. 결과: 시편의 전체 스캔 오차 비교와 축면 경사각에 따른 축면부위 오차비교에서 Delta9이 더 나은 밀링 재현성을 보였다(P < .05). 마진설정 시, 반경 0.9 mm에서 Delta9의 디자인과 출력물의 일치도가 더 우수했다(P < .05). 반면, Anti-rotation 형태 부여에 따른 유의할 만한 차이는 없었다. 부위별 오차 값 누적 비교에서는 Delta9이 대부분의 시편에서 더 작은 오차 값을 보였다(P < .05). 결론: Delta9이 대부분의 디자인 설정 환경에서 3Shape보다 더 작은 오차 값을 보였다. 이는 Delta9을 사용했을 때, 계획된 디자인과 출력물의 일치도가 3Shape과 유사하거나 더 좋은 출력물을 얻을 수 있음을 의미한다.

• 정보보호학회논문지
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• 제21권5호
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• pp.59-69
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• 2011

암호화 장비에 의해 소비되는 전력이 연산 데이터에 의존하는 특성을 이용한 전력 분석 공격이 제안된 이후, 이러한 연관성을 하드웨어에서 원천적으로 차단할 수 있는 많은 로직들이 개발되었다. 그 중 대부분의 로직들이 채택하고 있는 DRP로직은 전력 소비량을 균형 있게 유지하여, 연산 데이터와 소비 전력 간의 연관성을 제거한다. 하지만, 최근 설계 회로 규모 확장에 따른 semi-custom 디자인 방식의 적용이 불가피하게 되었고, 이러한 디자인 방식은 불균형적인 설계 패턴을 야기하여 DRP로직이 균형적인 전력을 소비하지 않는 문제점을 발생하도록 하였다. 이러한 불균형적인 전력 소비는 전력 분석 공격에 취약점이 된다. 본 논문에서는 이러한 불균형적인 전력 소비 패턴을 제거하기 위하여 양쪽 출력 노드를 동시에 discharge 시켜주는 동작을 추가한 DyCML로직 기반의 새로운 로직을 개발하였다. 본 논문에서는 또한 제안 기법의 성능을 증명하기 위해 1bit fulladder를 구성하여 기존 로직과의 성능을 비교하였다. 제안 로직은 전력 소비량의 균형성을 판단하는 지표인 NED와 NSD값에 대해 최대 60% 이상 성능 향상이 있음이 확인되었으며 전력 소비량 또한 다른 로직에 비하여 최대 55%정도 감소하는 것으로 확인되었다.