• 제목/요약/키워드: Current-Mode Circuit

검색결과 642건 처리시간 0.029초

Current-Mode Integrator using OA and OTAs and Its Applications

  • Katesuda Klahan;Worapong Tangsrirat;Teerasilapa Dumawipata;Walop Surakampontorn
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2002년도 ITC-CSCC -2
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    • pp.747-750
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    • 2002
  • A circuit building block for realizing a continuous-time active-only current-mode integrator is presented. The proposed integrator is composed only of internally compensated type operational amplifier (OA) and operational transconductance amplifiers (OTAs). The integrator is suitable for integrated circuit implementation in either bipolar or CMOS technologies, since it does not require any external passive elements. Moreover, the integrator gain can be tuned through the transconductance gains of the OTAs. Some application examples in the realization of current-mode network functions using the proposed current-mode integrator as an active element are also given.

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2-bit Flash ADC Based on Current Mode Algorithmic

  • Tipsuwanporn, V.;Chuenarom, S.;Maitreechit, S.;Chuchotsakunleot, W.;Kongrat, V.
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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    • pp.473-473
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    • 2000
  • This paper presents the 2-bit parallel algorithmic ADC using current mode for parallel method algorithm. It is operated by parallel conversion, 2-bit at each moment, and increase bit numbers by serial connection. The circuit operates in current mode. The comparison ratio can be controlled while working under mode operation. The circuit design used 0.8 ${\mu}{\textrm}{m}$ CMOS technology which capable to convert 2-bit in 50 ns, power consumed 0.786 nW, with input current 0-50 mA from 3V single supply. From simulation testing, the conversion rate is much faster than other method.

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VOF 방법을 이용한 GMA 용접의 금속 이행에 관한 동적 해석 (II) - 단락 이행 모드의 해석 - (Dynamic Analysis of Metal Transfer using VOF Method in GMAW (II) - Short Circuit Transfer Mode -)

  • 최상균;고성훈;유중돈;김희진
    • Journal of Welding and Joining
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    • 제15권3호
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    • pp.47-55
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    • 1997
  • Dynamic characteristics of the short circuit mode are investigated using the Volume of Fluid (VOF) method. When the initial molten drop volume, contact area and wire feed rate are given, rate change of the molten bridge profiles, pressure and velocity distributions are predicted. The electromagnetic force with proper boundary conditions are included in the formulation to consider the effects of welding current. It is found that the molten metal is transferred to the weld pool mainly due to the pressure difference caused by the curvatures in the initial stage, and electromagnetic force becomes dominant factor in the final stage of short circuit transfer. Necking occurs at the contact position between the molten drop and weld pool, and the initial molten drop volume and welding current have significant effects on break-up time.

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$GF(3^m)$상의 전류모드 CMOS 승산기 설계 (Design of $GF(3^m)$ Current-mode CMOS Multiplier)

  • 나기수;변기녕;김흥수
    • 전기전자학회논문지
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    • 제8권1호
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    • pp.54-62
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    • 2004
  • 본 논문에서는 $GF(3^m)$상의 전류모드CMOS 승산기의 설계에 관하여 논의한다. 피 승산항에 원시원소 α를 곱함으로써 나타나는 피 승산항의 변화를 표준기저 표현을 이용하여 수식으로 전개하였다. $GF(3^m)$ 승산 회로를 구성하기 위하여 전류모드 CMOS를 사용하여 GF(3)상의 가산기와 승산기를 설계하였고 시뮬레이션 결과를 보였다. 기본 게이트들을 이용하여 $GF(3^m)$ 승산기를 설계하였고 m=3인 경우에 대하여 예를 보였다. 본 논문에서 제안한승산회로는 그 구성이 블록의 형태로 이루어지므로 $GF(p^m)$ 상에서 p와 m에 대한 확장이 용이하며, VLSI 구현에 유리하다 할 수 있다. 본 논문에서 제안한승산회로를 타 승산회로와 비교하였고, 개선효과를 확인하였다.

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Decoupling Method Between Digital Signals on FPCB and Mobile Handset Antenna

  • Kim, Joon-Chul;Kim, Hyeong-Dong
    • ETRI Journal
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    • 제33권1호
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    • pp.121-124
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    • 2011
  • Digital harmonics, which may reduce the radio frequency sensitivity of a system, can be coupled with an antenna in a mobile handset. This letter presents a decoupling method for increasing the isolation between digital harmonics on a flexible printed circuit board (FPCB) and an antenna in terms of the ground mode current and the concept of reaction. We model the signal and ground lines in an FPCB as a loop circuit exciting a ground mode current and demonstrate a simple but efficient decoupling method for reducing the excited ground mode current.

Electrically tunable current mode high Q- bandpass filter

  • Tongkulboriboon, Seangrawee;Petchakit, Wijittra;Kiranon, Wiwat
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2005년도 ICCAS
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    • pp.237-240
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    • 2005
  • A novel current mode high Q bandpass filter with electronically tuable values of Q based on second generation current controlled conveyor CCCIIs is presented. The circuit offers the advantages of using a few passive elements. The center frequency and pole-Q can be independently adjusted by via dc bias current of CCCIIs, It is shown from SPICE simulation that the results agree well with theoretical analysis

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PWM 인버어터로 구동되는 유도 전동기의 고주파 누설전류 모델링 및 억제에 관한 연구 (A Study on Modeling and Damping of High-Frequency Leakage Currents in PWM Inverter Feeding an Induction Motor)

  • 이재호;전진휘;홍정표;강필순;박성준;김철우
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1998년도 연구회 합동 학술발표회 논문집
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    • pp.18-22
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    • 1998
  • A PWM inverter with an induction motor often has a problem with a high frequency leakage current that flows through stray capacitor between stator windings and a motor frame to ground. This paper presents an equivalent circuit for high frequency leakage currents in PWM inverter feeding an induction motor, which forms an LCR series resonant circuit. A conventional common mode ckoke or reactor in series between the ac terminals of a PWM inverter and those of an ac motor is not effective to reduce the rms and average values of the leakage current, but effective to reduce the peak value. Furthermore, this paper proposes a leakage current damper which is different in damping principle from the conventional common mode choke. It is shown theoretically and experimentally that the leakage current damper is able to reduce the rms value of the leakage current to 25%, where the core used in the leakage current damper is smaller than that of the conventional common-mode choke

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방향 절환이 자유로운 양방향 DC/DC 컨버터 개발 (Development of a Bidirectional DC/DC Converter with Smooth Transition Between Different Operation Modes)

  • 유창규;이우철
    • 대한전기학회논문지:전기기기및에너지변환시스템부문B
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    • 제55권4호
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    • pp.224-230
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    • 2006
  • The conventional way to implement a bidirectional converter with boost/buck has been to use two general purpose PWM ICs with a single supply voltage. In this case, when one direction mode is in operation, the other is disabled and the output of the error amplifier of the disabled IC may be saturated to a maximum value or zero. Therefore, during mode transition, a circuit which can disable the switching operation for a certain time interval is required making it impossible to get a seamless transition. In this paper, the limitations of the conventional 42V/14V bi-directional DC/DC converter implemented with general current mode PWM ICs with a single supply voltage are reviewed and a new current mode PWM controller circuit with a dual voltage system is proposed. The validity of the proposed circuit is investigated through simulation. and experiments.

Dual Mode AMOLED Pixel Circuit

  • Bae, Byung-Seong;Son, Yong-Duck;Jang, Jin;Lee, Ki-Yong;Chung, Ho-Kyoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.1082-1085
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    • 2006
  • We proposed dual mode pixel circuit in AMOLED (active matrix organic light emitting device). After light emitting period of OLED, we used it as a photo sensor. We measured photo current of OLED and simulated the proposed pixel circuit to verify it's function of dual mode, that is lighting and sensing.

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저 전력 SoC를 위한 저 누설전류 특성을 갖는 Self-Timed Current-Mode Logic Family (Self-timed Current-mode Logic Family having Low-leakage Current for Low-power SoCs)

  • 송진석;공정택;공배선
    • 대한전자공학회논문지SD
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    • 제45권8호
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    • pp.37-43
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    • 2008
  • 본 논문에서는 고속 동작에서 동적 전력 소비와 정적 전력 소비를 동시에 줄일 수 있는 self-timed current-mode Logic(STCML)을 제안한다. 제안된 로직 스타일은 펄스 신호로 가상 접지를 방전하여 로직 게이트의 누설 전류(subthreshold leakage current)를 획기적으로 감소시켰다. 또한, 본 로직은 개선된 self-timing buffer를 사용하여 동적모드 동작 시 발생되는 단락 회로 전류(short-circuit current)를 최소화하였다. 80-nm CMOS 공정을 이용하여 실시한 비교 실험 결과, 제안된 로직 스타일은 기존의 대표적인 current-mode logic인 DyCML에 비하여 동일한 시간 지연에서 26 배의 누설 전력 소비를 줄이고 27%의 동적 전력 소비를 줄일 수 있었다. 또한, 대표적인 디지털 로직 스타일인 DCVS와의 비교 결과, 59%의 누설 전력 소비감소 효과가 있었다.