• 한국초전도저온공학회:학술대회논문집
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• 한국초전도저온공학회 2001년도 학술대회 논문집
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• pp.72-75
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• 2001

The persistent current mode operation of HTS coils is one of the key technologies required for very high-field MRI magnets composed of LTS and HTS coils. But to date, the fabrication of persistent current mode system using HTS is not investigated well. In this paper, we fabricated the magnet and PCS using by BSCCO-2223 tape and jointed them with solder. The current decay behavior of the circuit was measured in liquid nitrogen by monitoring the magnetic field in the centre of magnet with a Hall sensor. To enhance the characteristic of persistent current mode system, superconducting joint method should be investigated.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1999년도 하계학술대회 논문집 F
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• pp.2512-2514
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• 1999

A new zero voltage and zero current switching(ZVZCS) full bridge DC-DC converter with transformer isolation is proposed for arc welding machines. The proposed DC-DC converter uses an auxiliary transformer to obtain ZCS for leading leg, which provides load current control capability even in short circuit condition. The auxiliary circuit also operates in ZVZCS mode. The power rating of the auxiliary transformer is about 10% of the main transformer. The operation is verified by experiments for 12[KW] prototype.

• 전력전자학회:학술대회논문집
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• 전력전자학회 1998년도 Proceedings ICPE 98 1998 International Conference on Power Electronics
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• pp.452-457
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• 1998

This paper deal with problems of leakage current, shaft voltage, bearing current, and EMI, in valiable-speed AC drives. The originating mechanism is illustrated with a high-frequency equivalent circuit. Reduction methods are classified in to six categories based on the equivalent circuit. Some experimental results show that a common-mode transformer (CMT) and a common-noise canceler (ACC) can solve the problems, which have been proposed the authors.

• ETRI Journal
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• 제39권4호
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• pp.582-591
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• 2017

To address the wire complexity problem in large-scale globally asynchronous, locally synchronous systems, a current-mode ternary encoding scheme was devised for a two-phase asynchronous protocol. However, for data transmission through a very long wire, few studies have been conducted on reducing the long propagation delay in current-mode circuits. Hence, this paper proposes a current steering logic (CSL) that is able to minimize the long delay for the devised current-mode ternary encoding scheme. The CSL creates pulse signals that charge or discharge the output signal in advance for a short period of time, and as a result, helps prevent a slack in the current signals. The encoder and decoder circuits employing the CSL are implemented using $0.25-{\mu}m$ CMOS technology. The results of an HSPICE simulation show that the normal and optimal mode operations of the CSL achieve a delay reduction of 11.8% and 28.1%, respectively, when compared to the original scheme for a 10-mm wire. They also reduce the power-delay product by 9.6% and 22.5%, respectively, at a data rate of 100 Mb/s for the same wire length.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2004년도 ICEIC The International Conference on Electronics Informations and Communications
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• pp.221-224
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• 2004

This paper proposed an ultra low-power CMOS exponential voltage-mode circuit using the Pseudo-exponential function for realizing the exponential characteristics. The proposed circuit provides high dB-linear output voltage range at low-voltage applications. In a $0.25\;\mu m$ CMOS process, the simulations show more than 35 dB output voltage range and 26 dB with the linearity error less than $\pm0.5\;dB.$ The average current consumption is less than 80 uA. The proposed circuit can be used for the design of an extremely low-power variable gain amplifier (VGA) and automatic gain control (AGC).

• 조명전기설비학회논문지
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• 제20권10호
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• pp.35-40
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• 2006

이 논문에서는 주파수 가변형 무선 personal area network(PAN) 통신시스템 및 단말에 적용이 가능한 응용 회로로써, 탭계수(tap coefficient) 회로를 가변시련 수 있는 전류모드 아날로그 finite impulse response (FIR) 필터를 제안한다. 가변되는 7-tap FIR 필터의 동작은 컴퓨터 모의실험으로부터 확인하였고, $0.8[{\mu}m]$ CMOS 공정기술을 사용하여 0.0625-step 탭계수 회로가 제작되었다. 제안된 FIR 필터는 탭계수의 길이와 계수를 가변시킬 수 있기 때문에 주파수 가변형 무선 PAN통신 시스템 및 단말기에 적용 가능한 유용한 특성을 갖는다.

• ETRI Journal
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• 제37권6호
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• pp.1154-1164
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• 2015

This paper proposes a fully sensorless driver for a permanent magnet synchronous motor (PMSM) integrated with a digital motor controller and an analog pre-driver, including sensing circuits and estimators. In the motor controller, a position estimator estimates the back electromotive force and rotor position using a sliding-mode observer. In the pre-driver, drivers for the power devices are designed with a level shifter and isolation technique. In addition, a current sensing circuit measures a three-phase current. All of these circuits are integrated in a single chip such that the driver achieves control of the speed with high accuracy. Using an IC fabricated using a $0.18{\mu}m$ BCDMOS process, the performance was verified experimentally. The driver showed stable operation in spite of the variation in speed and load, a similar efficiency near 1% compared to a commercial driver, a low speed error of about 0.1%, and therefore good performance for the PMSM drive.

• 한국산학기술학회논문지
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• 제10권12호
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• pp.3614-3621
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• 2009

본 논문에서는 이득 및 주파수 특성이 개선된 CMOS 저전압 전류모드 적분기가 설계되었다. 설계된 전류모드 적분기는 본 논문에서 새롭게 제안한 선형 캐스코드 회로를 기본으로 구성되었다. 제안된 전류모드 적분기는 기존의 전류미러형 전류모드 적분기의 이득(43.7dB) 및 단위이득주파수(15.2MHz) 비해서 높은 전류이득(47.8dB) 및 단위 이득 주파수(27.8MHz)의 특성을 얻을 수 있었다. 제안된 전류모드 적분기의 응용회로로써 차단주파수 7.03MHz를 갖는 5차 체비세프 저역통과 필터를 설계하였다. 설계된 모든 회로들은 1.8V-$0.18{\mu}m$ CMOS 공정파라메터로써 HSPICE를 이용하여 시뮬레이션되었다.

• 한국산학기술학회논문지
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• 제10권12호
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• pp.3638-3644
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• 2009

본 논문에서는 새롭게 제안한 선형 캐스코드 전류모드 적분기를 기본으로 구성된 다중채널 CMOS 저전압 전류모드 필터를 설계하였다. 제안된 전류모드 적분기는 기존의 전류미러형 전류모드 적분기 비해서 높은 전류이득 및 단위이득 주파수 특성을 얻을 수 있다. 5차 체비셰프 함수로써 구성한 필터는 신호흐름선도(SFG)기법에 의하여 능동필터로 변환되었다. 1.8V-$0.18{\mu}m$ CMOS 공정파라미터를 사용한 HSPICE 시뮬레이션 결과, 설계된 필터는 0.51MHz에서 7.03MHz대역까지의 주파수 조정범위를 가지며 Bluetooth, DECT, WCDMA의 3채널의 기저대역에서 사용할 수 있음을 확인하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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• pp.167-168
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• 2000

We propose a signaling circuit that can reduce power consumption and Electromagnetic Interference (EMI) in a Liquid Crystal Display (LCD) controller-to-source driver interface. The proposed signaling circuit consists of a coder/decoder that can minimize temporal bit transitions in a transmission line and a current-mode driver that can convert voltage swing into a very small amount of current. We have simulated the proposed signaling circuit using the HSPICE and the proposed signaling circuit has been designed in a 0.25 ${\mu}m$ CMOS technology.