• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.381-386
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• 2011

This paper presents the design and reliability evaluation of metallized film capacitor for power e lectronics application. The rated voltage of development capacitor is DC 3300[V], the capacitance is 5 ${\mu}F$ and the ripple current capability is 130 $A_{rms}$. Film metallization and patterns are an important design factor that has been development enhance the electric and reliability properties of film capacitor for power electronics. In term of capacitor construction and metallized pattern is one of the parameters that can be modified to further improve the rating in the terms of maximum ripple current and lifetime. This capacitor can be used as snubber capacitor application such as power train invertor system.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.5
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• pp.429-436
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• 2015

Torque ripples generate mechanical vibration at low speed and acoustic noise at high speed. The back emf harmonics of a PM synchronous motor is one of the main sources of torque ripples. To reduce torque ripples resulting from back emf harmonics, dq-axis harmonic currents that reduce the torque ripples are generally compensated to the current controller. Harmonic current compensation is effective at low speed, but it is not applicable at high speed because of the limited bandwidth of the current controller. In this study, dq-axis harmonic voltage compensation that can reduce torque ripples at high speed is proposed. The dq-axis harmonic voltages are calculated from the motor speed and the dq-axis harmonic currents. The effectiveness of the proposed method in reducing torque ripple is verified by a simulation and experiments.

• Journal of Electrical Engineering and Technology
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• v.8 no.4
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• pp.808-812
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• 2013

Multilayer capacitors with high ripple current and high capacitance were manufactured. The electrical properties of these capacitors were characterized for potential application for DC-link capacitors in hybrid electric vehicle inverters. Internal electrode structures were designed to achieve high capacitance and reliability. A single multilayer capacitor showed $0.46{\mu}F/cm^3$ of capacitance, 0.65% of dielectric loss, and 1450 V to 1650 V of dielectric breakdown voltage depending on the design of the internal electrode. The capacitor module designed with several multilayer capacitors gave a total capacitance of $450{\mu}F$, which is enough for hybrid electric vehicles. In particular, an equivalent series resistance of $4.5m{\Omega}$ or less will result in 60 $A_{rms}$, thereby reaching the allowed ripple current for hybrid electric vehicles.

• Journal of Power Electronics
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• v.19 no.3
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• pp.665-675
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• 2019

Renewable energy based on photovoltaic systems is beginning to play an important role to supply power to remote areas all over the world. Owing to the lower output voltage of photovoltaic arrays, high gain DC-DC converters with a high efficiency are required in practice. This paper presents a novel interleaved DC-DC boost converter with a high voltage gain, where the input terminal is interlaced in parallel and the output terminal is staggered in series (IPOSB). The IPOSB configuration can reduce input current ripples because two inductors are interlaced in parallel. The double output capacitors are charged in staggered parallel and discharged in series for the load. Therefore, IPOSB can attain a high step-up conversion and a lower output voltage ripple. In addtion, the output voltage can be automatically divided by two capacitors, without the need for extra sharing control methods. At the same time, the voltage stress of the power devices is lowered. The inrush current problem of capacitors is restrained by the inductor when compared with high gain converters with a switching-capacitor structure. The working principle and steady-state characteristics of the converter are analyzed in detail. The correctness of the theoretical analysis is verified by experimental results.

• Journal of Power Electronics
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• v.17 no.2
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• pp.323-333
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• 2017

This paper proposes a model-based optimal control algorithm for the clamp switch of a zero-voltage switching (ZVS) bidirectional DC-DC converter. The bidirectional DC-DC converter (BDC) can accomplish the ZVS operation using the clamp switch. The minimum current for the ZVS operation is maintained, and the inductor current is separated from the input and output voltages by the clamp switch in this topology. The clamp switch can decrease the inductor current ripple, switching loss, and conduction loss of the system. Therefore, the optimal control of the clamp switch is significant to improve the efficiency of the system. This paper proposes a model-based optimal control algorithm using phase shift in a micro-controller unit. The proposed control algorithm is demonstrated by the results of PSIM simulations and an experiment conducted in a 1-kW ZVS BDC system.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.409-413
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• 2001

This paper presents a comprehensive study result on reducing commutation torque ripples generated in brushless dc motor drives with only a single dc-link current sensor provided. In brushless dc motor drives with only a single current sensor, the commutation torque ripple suppression that is practically effective in low speed as well as high speed regions has not been reported. A proposed commutation compensation technique based on deadbeat dc-link current controller takes a closed loop control scheme and a parameter insensitive property. The proposed control method is verified through simulations and experiments.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.806-807
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• 2011

This paper presents a new sensorless controller used with both the classical sliding mode observer(SMO) and the rate of current change in order to a reduced torque ripple for switched reluctance motor (SRM) sensorless drives. The new sensorless scheme consists of a sliding mode observer (SMO)-based position sensorless approach for high speeds along with a low-resolution discrete the rate of current change for low speeds and standstill. The new position estimation resets between the SMO and the low-resolution of current change according to the speed sign and the position error difference between the SMO and the low-resolution rate of current change. The simulation results show the robustness of this new high performance sensorless control approach with the hybrid sensorless control topology.

• Journal of Electrical Engineering and Technology
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• v.8 no.5
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• pp.1062-1069
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• 2013

This paper proposes a simple current compensation method to improve the control performance of B4 inverters. Four-switch inverters so called B4 inverters employ only four switches. They have a split dc-link and one phase of three-phase motors is connected to the center-tap of split dc-link capacitors in B4 inverters. The voltage ripples in the center tap of the dc-link generate unbalanced three-phase voltages causing current ripples. To solve this problem, this paper presents a simple compensation method that adjusts switching times considering dc-link voltage ripples. The validity of the proposed method is verified by simulations and experiments carried out with a 1 HP induction machine.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.2
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• pp.173-179
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• 2003

In this paper, a novel on-line dc capacitance estimation method for the three-phase PWM converter is proposed. At no load, input current at a low frequency is injected, which causes dc voltage ripple. With the at voltage and current ripple components of the dc side, the capacitance can be calculated. Experimental result shows that the estimation error is less than 2%.

• Journal of Power Electronics
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• v.12 no.4
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• pp.643-653
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• 2012

An interleaved DC/DC converter with series-connected transformers is presented to implement the features of zero voltage switching (ZVS), load current sharing and ripple current reduction. The proposed converter includes two half-bridge converter cells connected in series to reduce the voltage stress of the switches at one-half of the input voltage. The output sides of the two converter cells with interleaved pulse-width modulation are connected in parallel to reduce the ripple current at the output capacitor and to achieve load current sharing. Therefore, the size of the output chokes and the capacitor can be reduced. The output capacitances of the MOSFETs and the resonant inductances are resonant at the transition instant to achieve ZVS turn-on. In addition, the switching losses on the power switches are reduced. Finally, experiments on a laboratory prototype (24V/40A) are provided to demonstrate the performance of the proposed converter.