• The Transactions of the Korean Institute of Power Electronics
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• v.26 no.1
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• pp.66-73
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• 2021

This study presents a novel four-channel light-emitting diode (LED) current balancing topology using a current-fed hybrid quasi-Z-source converter. With the proposed structure, currents flowing through four LED strings are automatically balanced owing to the charge (amp-sec) balance condition on capacitors. Thus, automatic current balancing of the proposed driver is simple and precise. In addition, the proposed LED driver uses only one active switch and three diodes. The operating principle and characteristics of the proposed four-channel LED driver are analyzed in detail. To verify the operation of the proposed LED driver, a prototype is built and tested with different numbers of LEDs.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.50 no.11
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• pp.568-574
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• 2001

This paper describes a current fed high frequency resonant inverter can be used as the power supply for wax-sealing. This circuit configuration is composed of conventional two unit inverter of single ended current find type in parallel. The proposed inverter can realize ZVS operation by using resonant capacitor to ZVS capacitor and has merits not only reduction of switch current distribution but also extension of load range in comparison with the conventional single-ended current fed high frequency resonant inverter. This analysis of proposed circuit uses normalized parameter and characteristic estimation which is needed in each step before design is generally described according to normalized frequency($\mu$), normalized resistance(λ) and parameters. On the basis of characteristic values, a method of the circuit design is presented. Also, the theoretical analysis is proved through experiment and this proposed circuit shows that it can be practically used as the power supply system for wax-sealing and DC-DC converter.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.28 no.1
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• pp.16-28
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• 2014

This paper presents a novel high-power-factor circuit topology of AC to AC current-fed type high frequency resonant inverter which includes the function of power factor correction(PFC) in the proposed inverter to operate the AC input block with high power factor. The proposed circuit topology of AC to AC current fed type high resonant inverter removes DC link electrolytic capacitor and has also the one of power factor correction(PFC) in the inverter circuit without an additional PFC circuit since the input current by constituting it in parallel as an unit inverter, which assumes the class-E high frequency resonant inverter of conventional current-fed type, flows in the form of the resultant current flowing through each constant current reactor($L_{d1}$, $L_{d2}$). The circuit analysis of proposed inverter is generally described by adopting the normalized parameters and the evaluation of its operating characteristics are conducted by using the parameters such as the ratio of switching and resonant frequency(${\mu}$), coupling coefficient(k) and so on. An example of procedure for circuit design based on the characteristic values obtained from the theoretical analysis is presented. To confirm the validity of the theoretical analysis, the experimental results are also presented. In the future, the proposed inverter shows it can be practically used as power supply system for induction heating application, DC-DC converter etc.

• The Transactions of the Korean Institute of Power Electronics
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• v.7 no.5
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• pp.405-412
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• 2002

Since the switching device of current-fed bridge-type topology suffers from him-off voltage spikes associated with larger energy than that of voltage-fed topology, a high-efficiency non-dissipative snubber is considered essential. However, the complicated operation and the capricious performance according to various conditions make the design of the non-dissipative difficult. In this paper, the non-dissipative snubber employed in the current-fed half-bridge converter operating at a duty ratio above 0.5 is completely analyzed and the design considerations are discussed. Some design examples and the experimental results are provided to confirm the analysis and design presented in this paper.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.6
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• pp.515-522
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• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both v voltage-fed and current-f,어 ek'Ctronic ballast. The proposed PFC circuits use valley-fil[(VF) type DClink s stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations d during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant c capaCltor In current-fed type, the charge pump capacitors are connc'Ctc'Cl with the additional second따y-side of t the power transformer. The measured PF is higher than 0.99 and THD is about 10% for all proposed PFC c circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for i implementing cost longrightarroweffective electronic ballast.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.2
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• pp.215-225
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• 1994

In this paper, a performance evaluation of different current regulators for induction motor drive systems fed by IGBT inverter is presented. The twoparts of current regulation are considered : current error compensation part, voltage modulation part. The characteristics of hysteresis, synchronous PI, decoupled PI, predictive, deadbeat and stage feedback controllers are analyzed and the steady-state performances and transient responses of current regulation are well compared through the simulation and experimental results.

• Proceedings of the KIEE Conference
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• 1999.07f
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• pp.2795-2797
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• 1999

Several power factor correction(PFC) circuits are presented to achieve high PF electronic ballast for both voltage-fed and current-fed electronic ballast. The proposed PFC circuits use valley-fill(VF) type DC-link stages modified from the conventional VF circuit to adopt the charge pumping method for PFC operations during the valley intervals. In voltage-fed ballast, charge pump capacitors are connected with the resonant capacitors. In current-fed type, the charge pump capacitors are connected with the additional secondary-side of the power transformer. The measured PF and THD are higher than 0.99 and 15% for all proposed PFC circuits. The lamp current CF is also acceptable in the proposed circuits. The proposed circuit is suitable for implementing cost-effective electronic ballast.

• Journal of Power Electronics
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• v.18 no.4
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• pp.955-964
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• 2018

In this paper, an active capacitor-diode-switch (CDS) snubber is proposed for L-type current-fed isolated DC-DC converters. The proposed CDS-clamped converter has a number of advantages. It can achieve wide range zero-voltage switching (ZVS) on two switches, a continuous input current with a low ripple, a reduction of one active switch and high efficiency. The operating principles, analysis and parameter design guideline are presented. A 300 W prototype is built to test the proposed converter. Simulation and experimental results are shown at 30 V input voltage and 400 V output voltage.

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.157-158
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• 2011

An active-clamped current-fed half-bridge converter is used for front-end converter for grid-connection of low voltage energy sources. In this paper, theoretical analysis on the loss and efficiency for an active-clamped current-fed half-bridge converter is presented. To analyze the loss of the presented converter, the RMS current of each device is derived and it's loss is calculated. The comparison between simulation result and computed value is presented to verify the validity of the theoretic results.

• Proceedings of the IEEK Conference
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• 2000.06e
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• pp.65-68
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• 2000

We design a new driving system of 5" true color FED using current controlled PWM method. Further more, we successfully developed a 5" FED panel, which resolution is 320$\times$240(Color). When we design a 5" FED driving circuit, FED tips are modeled as R-C for circuit simulator of FED driving circuit. In Video data processing, parallel R, G, B input signals is processed independently, so duty ratio increase and no noise, high quality performance is achieved in display of 5" FED. The luminance is about 100cd/$m^2$, the anode power consumption Is 2.1W and total power of the driving system is 21.54W