• Journal of Electrochemical Science and Technology
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• v.11 no.1
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• pp.92-98
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• 2020

SnO₂-based high-capacity anode materials are attractive candidate for the next-generation high-performance lithium-ion batteries since the theoretical capacity of SnO₂ can be ideally extended from 781 to 1494 mAh g^-1. Here 3D etched Cu foam is applied as a current collector for electron path and simultaneously a substrate for the SnO₂ coating, for developing an integrated electrode structure. We fabricate the 3D etched Cu foam through an auto-catalytic electroless plating method, and then coat the SnO₂ onto the self-supporting substrate through a simple sol-gel method. The catalytic dissolution of Cu metal makes secondary pores of both several micrometers and several tens of micrometers at the surface of Cu foam strut, besides main channel-like interconnected pores. Especially, the additional surface pores on etched Cu foam are intended for penetrating the individual strut of Cu foam, and thereby increasing the surface area for SnO₂ coating by using even the internal of Cu foam. The increased areal capacity with high structural integrity upon cycling is demonstrated in the SnO₂-coated 3D etched Cu foam. This study not only prepares the etched Cu foam using the spontaneous chemical reactions but also demonstrates the potential for electroless plating method about surface modification on various metal substrates.

• Journal of the Korean Society for Heat Treatment
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• v.20 no.6
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• pp.318-322
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• 2007

The high electrical conductivity Cu-0.15% Sn alloys containing various P contents, and the high conductivity and high strength Cu-0.1% Sn-0.1%Ag alloys with various Mg/P additions were fabricated and their mechanical properties and electrical conductivity were investigated. The electrical conductivity was generally decreased as the P content was increased where as the hardness and strength was shown to increase. When Mg was added to P-containing Cu alloys, the detrimental effect of P on the conductivity was significantly reduced, and TEM observations indicated that the formation of $Mg_3P_2$ phase is responsible for this result.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.3
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• pp.267-271
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• 2004

The joint strength and fracture surface of Sn-Pb solder bump in photo diode packages after isothermal aging testing were studied experimentally. Cu/Sn-Pb solders were adopted, and aged for up to 900 hours at 12$0^{\circ}C$ and 17$0^{\circ}C$ to analyze the effect of intermetallic compound(IMC). In 900-hour aging experiments, the maximum shea strength of Sn-Pb solder decreased by 20％ and 9％. The diffraction patterns of Cu$_{6}$Sn$_{5}$, scallop-shape IMC, and planar-shape Cu$_3$Sn were observed by Transmission Electron Microscopy (TEM).EM).

• Journal of the Microelectronics and Packaging Society
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• v.10 no.3
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• pp.29-35
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• 2003

The Sn-based lead-free solders with varying microstructure were prepared by changing the cooling rate from the melt. Bulky as-cast SnAg, SnAgCu, and SnCu, alloys were cold rolled and thermally stabilized before the creep tests so that there would be very small amount of microstructural change during creep (TS), and thin specimens were water quenched from the melt (WQ) to simulate microstructures of the as-reflowed solders in flip chips. Cooling rates of the WQ specimens were 140∼150 K/sec, and the resultant $\beta-Sn$ globule size was 5∼10 times smaller than that of the TS specimens. Subsequent creep tests showed that the minimum strain rate of TS specimens was about $10_2$ times higher than that of the WQ specimens. Fractographic analyses showed that creep rupture of the TS-SnAgCu specimens occurred by the nucleation of voids on the $Ag_3Sn$ Sn or $Cu_6Sn_5$ particles in the matrix, their subsequent growth by the power-law creep, and inter-linkage of microcracks to form macrocracks which led to the fast failure. On the other hand, no creep voids were found in the WQ specimens due to the mode III shear rupture coming from the thin specimens geometry.

• Korean Journal of Materials Research
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• v.23 no.12
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• pp.722-726
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• 2013

Freeze drying of a porous Cu-Sn alloy with unidirectionally aligned pore channels was accomplished by using a composite powder of CuO-$SnO_2$ and camphene. Camphene slurries with CuO-$SnO_2$ content of 3, 5 and 10 vol% were prepared by mixing with a small amount of dispersant at $50^{\circ}C$. Freezing of a slurry was done at $-25^{\circ}C$ while the growth direction of the camphene was unidirectionally controlled. Pores were generated subsequently by sublimation of the camphene during drying in air for 48 h. The green bodies were hydrogen-reduced at $650^{\circ}C$ and then were sintered at $650^{\circ}C$ and $750^{\circ}C$ for 1 h. XRD analysis revealed that the CuO-$SnO_2$ powder was completely converted to Cu-Sn alloy without any reaction phases. The sintered samples showed large pores with an average size of above $100{\mu}m$ which were aligned parallel to the camphene growth direction. Also, the internal walls of the large pores had relatively small pores. The size of the large pores decreased with increasing CuO-$SnO_2$ content due to the change of the degree of powder rearrangement in the slurry. The size of the small pores decreased with increase of the sintering temperature from $650^{\circ}C$ to $750^{\circ}C$, while that of the large pores was unchanged. These results suggest that a porous alloy body with aligned large pores can be fabricated by a freeze-drying and hydrogen reduction process using oxide powders.

• Current Photovoltaic Research
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• v.10 no.2
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• pp.39-48
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• 2022

A Se-containing Cu/SnSe₂/ZnSe precursor was employed to introduce S to the precursor to form Cu₂ZnSn(S,Se)₄ (CZTSSe) film. The morphology of CZTSSe films strongly varied with two different pre-annealing environments: S and N₂. The CZTSSe film with S pre-annealing showed a dense morphology with a smooth surface, while that with N₂ pre-annealing showed a porous film with a plate-shaped grains on the surface. CuS and Cu₂Sn(S,Se)₃ phases formed during the S pre-annealing stage, while SnSe and Cu₂SnSe₃ phases formed during the N₂ pre-annealing stage. The SnSe phase formed during N₂ pre-annealing generated SnS₂ phase that had plate shape and severely aggravated the morphology of CZTSSe film. The power conversion efficiency of the CZTSSe solar cell with S pre-annealing was low (1.9%) due to existence of Zn(S.Se) layer between CZTSSe and Mo substrate. The results indicated that S pre-annealing of the precursor was a promising method to achieve a good morphology for large area application.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.11a
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• pp.75-87
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• 2001

Three different kinds of substrate used in this study : bare Cu substrate, Ni-P/Cu substrate with a Ni-P layer thickness of $5\mu\textrm{m},$ and Au/Ni-P/Cu substrate with the Ni-P and Au layers of $0.15\mu\textrm{m}$ and $5\mu\textrm{m}$ thickness respectively. The wettability of various Sn-base solders was affected by the substrate metal finish used, i.e., nickel, gold and copper. On the Au/Ni-F/Cu substrate, Sn-base solders wet better than any of the other substrate metal finishes tested. The interfacial reaction between various substrate and Sn-base solder was investigated at $70^{\circ}C,$ $100^{\circ}C,$ $120^{\circ}C,$ $150^{\circ}C,$ $170^{\circ}C$ and $200^{\circ}C$ for reaction times ranging from 0 day to 60 day. Intermetallic phases was formed along a Sn-base solder/ various substrate interface during solid-state aging. The apparent activation energy for growth of Sn-Ag/Cu, Sn-Ag-Bi/Cu, and Sn-Bi/Cu couples were 65.4, 88.6, and 127.9 Kj/mol, respectively. After isothermal aging, the fracture surface shoved various characteristics depending on aging temperature and time, and the types of BGA pad.

• 연구논문집
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• s.24
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• pp.63-79
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• 1994

This article reports a experimental study of the method to achieve a bond joint at lower temperature in a short time. DC magnetron sputtering of Sn, Sn/Pb, Sn/In and Sn/Cu on copper substrate was provided as an interlayer for Cu to Cu bonding under the air environment. Various examination was conducted and investigated on the effect of experimental parameters such as coating materials, coating time(or coating thickness), bonding temperature and bonding time etc. Bonding was performed at the temperature of $210^\circC-320^\circC$ for 0sec and interfacial reaction between the coated layer and copper substrate was examined using optical, scanning electron microscope and x-ray diffractometer. From the obtained results, it was found that intermetallic compounds layer consisted of $\eta-phase(Cu_6Sn_5)$ and $\beta-phase(Cu_3Sn)$ was formed at the joint interface for almost all coating materials. But the dominant phase formed in the preetched Cu substrate coated with Sn was $\beta-phase$. A characteristic morphology looks like a reaction ring, which was believed as the strong interconnecting regions between two substrates, was found to be formed on the reaction surface of copper substrates. The morphologies and compositions of the intermetallics, which depends on the regions of the reaction surface, was appeared as greatly different. Based on above results, the new bonding process to make the joint at lower temperature for short time can be admitted as a feasible process.

• Journal of Welding and Joining
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• v.31 no.3
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• pp.17-21
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• 2013

Sn whiskers are one of the serious causes of the failure of electronics. Sn whiskers grow spontaneously from Sn-based, lead-free finished surfaces, even at room temperature. A primary factor of these Sn whiskers growth is compressive stress, which enhances the diffusion of Sn or other elements. The sources of compressive stress are the growth of non-uniform large intermetallic compounds along the interface between the Sn grain boundary and Cu substrate. Recent studies revealed the methods for reducing Sn whisker growth. This paper gives an overview about recent researches for mitigation methods of Sn whisker growth during nearly room temperature storage.

• Current Photovoltaic Research
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• v.1 no.2
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• pp.82-89
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• 2013

$Cu_2ZnSnS_4$ thin film have been fabricated by rapid thermal annealing of dc-sputtered metal precursor with Cu/ZnSn/Cu stack in sulfur ambient. A CZTS film with a good uniformity was formed at $560^{\circ}C$ in 6 min. $Cu_2SnS_3$ and $Cu_3SnS_4$ secondary phases were present at $540^{\circ}C$ and a trace amount of $Cu_2SnS_3$ secondary phase was present at $560^{\circ}C$. Single-phase large-grained CZTS film with rough surface was formed at $560^{\circ}C$. Solar cell with best efficiency of 4.7% ($V_{oc}=632mV$, $j_{sc}=15.8mA/cm^2$, FF = 47.13%) for an area of $0.44cm^2$ was obtained for the CZTS absorber grown at $560^{\circ}C$ for 6 min. The existence of second phase at lower-temperature annealing and rough surface at higher-temperature annealing caused the degradation of cell performance. Also poor back contact by void formation deteriorated cell performance. The fill factor was below 0.5; it should be increased by minimizing voids at the CZTS/Mo interface. Our results suggest that CZTS absorbers can be grown by rapid thermal annealing of metallic precursors in sulfur ambient for short process times ranging in minutes.