• 한국태양에너지학회:학술대회논문집
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• 한국태양에너지학회 2009년도 춘계학술발표대회 논문집
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• pp.230-234
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• 2009

It is significant technique to increase competitiveness that solar cells have a high energy conversion efficiency and cost effectiveness. When making high efficiency crystalline Si solar cells, evaporated Ti/Pd/Ag contact system is widely used in order to reduce the electrical resistance of the contact fingers. However, the evaporation process is no applicable to mass production because high vacuum is needed. Furthermore, those metals are too expensive to be applied for terrestrial applications. Ni/Cu/Ag contact system of silicon solar cells offers a relatively inexpensive method of making electrical contact. Ni silicide formation is one of the indispensable techniques for Ni/Cu/Ag contact sytem. Ni was electroless plated on the front grid pattern, After Ni electroless plating, the cells were annealed by RTP(Rapid Thermal Process). Ni silicide(NiSi) has certain advantages over Ti silicide($TiSi_2$), lower temperature anneal, one step anneal, low resistivity, low silicon consumption, low film stress, absence of reaction between the annealing ambient. Ni/Cu/Ag metallization scheme is an important process in the direction of cost reduction for solar cells of high efficiency. In this article we shall report an investigation of rapid thermal silicidation of nickel on silngle crystalline silicon wafers in the annealing range of $350-390^{\circ}C$. The samples annealed at temperatures from 350 to $390^{\circ}C$ have been analyzed by SEM(Scanning Electron Microscopy).

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• 반도체디스플레이기술학회지
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• 제12권3호
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• pp.41-46
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• 2013

Efficient and inexpensive solar cells are necessary for photo-voltaic to be widely adopted for mainstream electricity generation. For this to occur, the recombination losses of charge carriers (i.e. electrons or holes) must be minimized using a surface passivation technique suitable for manufacturing. Recently it has been shown that aluminum oxide thin films are negatively charged dielectrics that provide excellent surface passivation of silicon solar cells to attract positive-charged holes. Especially aluminum oxide thin film is a quite suitable passivation on the rear side of p-type silicon solar cells. This paper, it demonstrate the interfacial microstructure and electrical properties of mono-crystalline silicon surface passivated by $Al_2O_3$ films during firing process as applied for screen-printed solar cells. The first task is a comparison of the interfacial microstructure and chemical bonds of PECVD $Al_2O_3$ and of PEALD $Al_2O_3$ films for the surface passivation of silicon. The second is to study electrical properties of double-stacked layers of PEALD $Al_2O_3$/PECVD SiN films after firing process in the temperature range of $650{\sim}950^{\circ}C$.

• 한국전기전자재료학회논문지
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• 제30권3호
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• pp.192-197
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• 2017

Hydrogenated Amorphous Silicon (a-Si:H) is used as an emitter layer in HIT (heterojunction with Intrinsic Thin layer) solar cells. Its low band gap and low optical properties (low transmittance and high absorption) cause parasitic absorption on the front side of a solar cell that significantly reduces the solar cell blue response. To overcome this, research on CSC (carrier Selective Contacts) is being actively carried out to reduce carrier recombination and improve carrier transportation as a means to approach the theoretical efficiency of silicon solar cells. Among CSC materials, molybdenum oxide ($MoO_x$) is most commonly used for the hole transport layer (HTL) of a solar cell due to its high work function and wide band gap. This paper analyzes the electrical and optical properties of $MoO_x$ thin films for use in the HTL of HIT solar cells. The optical properties of $MoO_x$ show better performance than a-Si:H and ${\mu}c-SiO_x:H$.

• Transactions on Electrical and Electronic Materials
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• 제17권5호
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• pp.275-279
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• 2016

This is a brief review on light trapping in Si based thin film solar cells with textured surfaces and transparent conducting oxide front electrodes. The light trapping scheme appears to be essential in improving device efficiency over 10%. As light absorption in a thin film solar cells is not sufficient, light trapping becomes necessary to be effectively implemented with a textured surface. Surface texturing helps in the light trapping, and thereby raises short circuit current density and its efficiency. Such a scheme can be adapted to single junction as well as tandem solar cell, amorphous or micro-crystalline devices. A tandem cell is expected to have superior performance in comparison to a single junction cell and random surface textures appears to be preferable to a periodic structures.

• 한국결정성장학회지
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• 제20권6호
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• pp.254-261
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• 2010

본 연구에서는 다결정 실리콘 태양전지 응용을 위한 다결정 실리콘 씨앗층의 제조와 그의 특성에 관한 연구를 수행하였다. 다결정 실리콘 씨앗층은 glass/Al/$Al_2O_3$/a-Si 구조를 이용하여 aluminum-induced layer exchange(ALILE) 고정으로 제조하였으며, 자연산화막부터 50 nm까지 다양한 크기로 $Al_2O_3$ 막두께를 변화시켜 알루미늄 유도 결정화 공정에서 막의 두께가 결정화 특성 및 결정결함, 결정크기에 미치는 영향에 대하여 조사하였다. 연구결과, ALILE 공정으로 생성된 다결정 실리콘막의 결함은 $Al_2O_3$ 막의 두께가 증가할수록 함께 증가한 반면, 결정화 정도와 결정입자의 크기는 $Al_2O_3$막의 두께가 증가할수록 감소하였다. 본 실험에서는 16 nm 두께 이하의 앓은 $Al_2O_3$ 막의 구조에서 평균 약 $10\;{\mu}m$ 크기의 sub-grain 결정립을 얻었으며, 결정성은 <111> 방향의 우선 배향성 특성을 보였다.

• 한국세라믹학회지
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• 제46권6호
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• pp.685-688
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• 2009

Surface Texturing is very important process for high cell efficiency in crystalline silicon solar cell. Anisotropic texturing with an alkali etchant was known not to be able to produce uniform surface morphology in multi-crystalline silicon (mc-Si), because of its different etching rate with random crystal orientation. In order to reduce surface reflectance of mc-Si wafer, the general etching tendency was studied with HF/HN$O_3$/De-ionized Water acidic solution. And the surface structures of textured mc-Si in various HF/HN$O_3$ ratios were compared. The surface morphology and reflectance of textured silicon wafers were measured by FE-SEM and UVvisible spectrophotometer, respectively. We obtained average reflectance of $16{\sim}19$% for wavelength between 400 nm and 900 nm depending on different etching conditions.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.243-243
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• 2010

This paper two different etching, HF : HNO3 :DI and RIE were used for etching in multi-crystalline Silicon(Mc-Si) solar cell fabrication. The wafers etched in RIE texture showed low reflectance compared to the wafers etched in Acid soultion after SiNx deposition. In light current-voltage results, the cells etched in RIE texture exhibited higher short circuit current and open circuit voltage than those of the cells etched in acid solution. We have obtained 15.1% conversion efficiency in large area($156cm^2$) Multi-Si solar cells etched in RIE texture.

• 한국태양에너지학회 논문집
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• 제30권6호
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• pp.102-107
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• 2010

a-Si solar cell has relatively dominant drift current when compared with crystalline solar cell due to the high internal electric field. Such drift current make an impact on the PV module in the local shading. In this paper, the a-Si PV module output characteristics of shading effects was approached in terms of process condition, because of the different deposition layer of thin film lead to rising the resistance. We suggested design condition to ensure the long-term durability of the module with regard to the degradation factors such as hot spot by analyzing the module specification. The result shows a remarkable difference on module uniformity for each shading position. In addition, the unbalanced power loss due to power mismatch of each module could intensify the degradation.

• 한국태양에너지학회:학술대회논문집
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• 한국태양에너지학회 2011년도 추계학술발표대회 논문집
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• pp.56-59
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• 2011

The process conditions for high efficiency industrial crystalline Si solar cells with selective emitter were optimized. In the screen printed solar cells, the sheet resistance must be 50-60V/sq. because of metal contact resistance. But the low sheet resistance causes the increase of the recombination and blue response at the short wavelength. Therefore, the screen printed solar cells with homogeneous emitter have limitations of efficiency, and this means that the selective emitter must be used to improve cell efficiency. This work demonstrates the feasibility of a commercially available selective emitter process, based on screen printing and conventional diffusion process. Now, we improved cell efficiency from 18.29% to18.45% by transition of heavy emitter pattern and shallow emitter doping condition.