• Journal of Power Electronics
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• v.19 no.6
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• pp.1413-1428
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• 2019

In this paper, a novel zero-voltage and zero-current switching (ZVZCS) interleaved two switch forward converter is proposed. By using a coupled-inductor-type smoothing filter, a snubber capacitor, the parallel capacitance of the leading switches and the transformer parasitic inductance, the proposed converter can realize soft-switching for the main power switches. This converter can effectively reduce the primary circulating current loss by using the coupled inductor and the snubber capacitor. Furthermore, this converter can reduce the reverse recovery loss, parasitic ringing and transient voltage stress in the secondary rectifier diodes caused by the leakage inductors of the transformer and the coupled inductance. The operation principle and steady state characteristics of the converter are analyzed according to the equivalent circuits in different operation modes. The practical effectiveness of the proposed converter was is illustrated by simulation and experimental results via a 500W, 100 kHz prototype using the power MOSFET.

• The Transactions of the Korean Institute of Power Electronics
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• v.10 no.4
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• pp.356-362
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• 2005

In this paper, in order to develop a simple and high efficient ballast without an external ignitor, a half-bridge type ballast with a coupled inductor and a frequency controlled synchronous rectifier is proposed. The Internal LC resonance of the buck converter is used to generate a high voltage pulse for the ignition, and the coupled inductor filter is used for steady state ripple cancellation. Also, a synchronous buck converter is applied for the DC/DC converter stage. In order to improve the efficiency of the ballast, a frequency control method is proposed. This scheme reduces a circulation current and trun off loss of the MOSFET switch on the constant power operation, which results in increase of the efficiency of the ballast system about 4$\%$, compared to a fixed frequency control. It consists a 2-stage version ballast with a PFC circuit. The results are verified nth hardware experiments.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.24 no.6A
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• pp.913-919
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• 1999

A systematic synthesis process is presented for the design of ADSL POTS splitters. It consists of a low-pass filter formed by a single-ended inductor, balanced inductor, and balance tightly coupled transformer. This three low-pass filters has been simulation. Simulation results show agreement of frequency characteristics. Therefore, POTS splitters using a commercial balance tightly coupled transformer are designed for the applications of ADSL system. The experimental results show that POTS splitter in the ADSL system has ripple decibel of less than $\pm$0.5 dB over a frequency range from 0.2 kHz to 3.4 kHz(or an audio band frequency) and delay distortion of less than 130 $mutextrm{s}$ over a frequency range from 0.6 kHz to 3.2 kHz.

• Proceedings of the KIPE Conference
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• 2004.11a
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• pp.71-75
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• 2004

In this paper, in order to develop a simple and high efficient ballast without an external igniter, a half-bridge type ballast with a coupled inductor and a frequency controlled synchronous rectifier is proposed. The internal LC resonance of the buck converter is used In generate a high voltage pulse for the ignition, and the coupled inductor filter is used for steady state ripple cancellation. Also, a synchronous buck converter is applied for the DC/DC converter stage. In order to improve the efficiency of the ballast, a frequency control method is proposed. This scheme reduces a circulation current and turn off loss of the MOSFET switch on the constant power operation, which results in increase of the efficiency of the ballast system about $4\%$, compared to a fixed frequency control. It consists a 2-stage version ballast with a PFC circuit. The results are verified with hardware experiments.

• Journal of Power Electronics
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• v.17 no.3
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• pp.590-600
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• 2017

This paper presents a ripple-free input current modified interleaved boost converter for high step-up applications. By integrating dual coupled inductors and voltage multiplier techniques, the proposed converter can reach a high step-up gain without an extremely high turn-ON period. In addition, a very small auxiliary inductor employed in series to the input dc source makes the input current ripple theoretically decreased to zero, which simplifies the design of the electromagnetic interference (EMI) filter. In addition, the voltage stresses on the semiconductor devices of the proposed converter are efficiently reduced, which makes high performance MOSFETs with low voltage rated and low resistance $r_{DS}$(ON) available to reduce the cost and conduction loss. The operating principles and steady-state analyses of the proposed converter are introduced in detail. Finally, a prototype circuit rated at 400W with a 42-50V input voltage and a 400V output voltage is built and tested to verify the effectiveness of theoretical analysis. Experimental results show that an efficiency of 95.3% can be achieved.