• 제목/요약/키워드: Coupled inductor filter

검색결과 15건 처리시간 0.015초

Zero-Voltage and Zero-Current Switching Interleaved Two-Switch Forward Converter

  • Chu, Enhui;Bao, Jianqun;Song, Qi;Zhang, Yang;Xie, Haolin;Chen, Zhifang;Zhou, Yue
    • Journal of Power Electronics
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    • 제19권6호
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    • pp.1413-1428
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    • 2019
  • In this paper, a novel zero-voltage and zero-current switching (ZVZCS) interleaved two switch forward converter is proposed. By using a coupled-inductor-type smoothing filter, a snubber capacitor, the parallel capacitance of the leading switches and the transformer parasitic inductance, the proposed converter can realize soft-switching for the main power switches. This converter can effectively reduce the primary circulating current loss by using the coupled inductor and the snubber capacitor. Furthermore, this converter can reduce the reverse recovery loss, parasitic ringing and transient voltage stress in the secondary rectifier diodes caused by the leakage inductors of the transformer and the coupled inductance. The operation principle and steady state characteristics of the converter are analyzed according to the equivalent circuits in different operation modes. The practical effectiveness of the proposed converter was is illustrated by simulation and experimental results via a 500W, 100 kHz prototype using the power MOSFET.

주파수 가변 동기 정류기를 이용한 고효율 MHD 램프 안정기 (The high Efficiency Ballast for MHD Lamp with a Frequency Controlled Synchronous Rectifier)

  • 현병철;이인규;조보형
    • 전력전자학회논문지
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    • 제10권4호
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    • pp.356-362
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    • 2005
  • 본 논문에서는 외부 이그니터가 없는 간단한 고효율 안정기를 만들기 위해 커플 인덕터와 주파수가변. 동기 정류기를 이용한 하프 브리지 방식의 안정기를 제안한다. 램프 점등시 고압을 발생시키기 위해 벅 컨버터 내부의 LC 공진이 사용되었고, 정상상태의 리플을 줄이기 위해 커플 인덕터가 사용되었다. DC/DC컨버터로는 동기형 벅 컨버터가 사용되었다. 안정기의 효율을 높이기 위해 가변 주파수 방식을 제안하였다. 이 방식은 순환 전류와 정전력 동작 하에서 MOSFET 스위치의 턴 오프 손실을 감소 시켜 고정 주파수 방식에 비해 안정기 효율을 약 4$\%$ 향상 시킨다. 회로 구성은 PFC와 안정기 2단으로 구성된다 결과는 실험을 통하여 검증된다.

수동 소자를 이용한 ADSL POTS Splitter의 체계적인 설계 (A Systematical Design of ADSL POTS Splitter Using Passive Devices)

  • 박지만;김진태;소운섭
    • 한국통신학회논문지
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    • 제24권6A호
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    • pp.913-919
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    • 1999
  • ADSL POTS splitter를 설계하기 위한 체계적인 합성 과정을 제안하였다. 이들은 single-ended 인덕터, 균형 인덕터, 그리고 균형 밀결합 변압기 형태의 저역-통과 여파기로 구성된다. 이 3개의 저역-통과 여파기를 시뮬레이션한 결과, 주파수 특성이 일치함을 보여준다. ADSL 시스템에 적용하기 위해, 상업용 균형 밀결합 변압기를 이용하여 POTS splitter를 설계하였다. 그것을 실험한 결과, ADSL 시스템에서 POTS splitter가 0.2 kHz에서 3.4kHz까지의 주파수 범위에서(또는 음성 대역 주파수에서) $\pm$0.5dB보다 작은 리플 데시벨과 0.6 kHz에서 3.2kHz까지의 주파수 범위에서 130 $\mu\textrm{s}$보다 작은 지연 왜곡을 가진다는 것을 알았다.

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주파수 가변 동기 정류기를 이용한 고효율 MHD 램프 안정기 (A High Efficiency MHD Lamp Ballast with a Frequency Controlled Synchronous Rectifier)

  • 현병철;이인규;조보형
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 2004년도 추계학술대회 논문집
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    • pp.71-75
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    • 2004
  • In this paper, in order to develop a simple and high efficient ballast without an external igniter, a half-bridge type ballast with a coupled inductor and a frequency controlled synchronous rectifier is proposed. The internal LC resonance of the buck converter is used In generate a high voltage pulse for the ignition, and the coupled inductor filter is used for steady state ripple cancellation. Also, a synchronous buck converter is applied for the DC/DC converter stage. In order to improve the efficiency of the ballast, a frequency control method is proposed. This scheme reduces a circulation current and turn off loss of the MOSFET switch on the constant power operation, which results in increase of the efficiency of the ballast system about $4\%$, compared to a fixed frequency control. It consists a 2-stage version ballast with a PFC circuit. The results are verified with hardware experiments.

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A Ripple-free Input Current Interleaved Converter with Dual Coupled Inductors for High Step-up Applications

  • Hu, Xuefeng;Zhang, Meng;Li, Yongchao;Li, Linpeng;Wu, Guiyang
    • Journal of Power Electronics
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    • 제17권3호
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    • pp.590-600
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    • 2017
  • This paper presents a ripple-free input current modified interleaved boost converter for high step-up applications. By integrating dual coupled inductors and voltage multiplier techniques, the proposed converter can reach a high step-up gain without an extremely high turn-ON period. In addition, a very small auxiliary inductor employed in series to the input dc source makes the input current ripple theoretically decreased to zero, which simplifies the design of the electromagnetic interference (EMI) filter. In addition, the voltage stresses on the semiconductor devices of the proposed converter are efficiently reduced, which makes high performance MOSFETs with low voltage rated and low resistance $r_{DS}$(ON) available to reduce the cost and conduction loss. The operating principles and steady-state analyses of the proposed converter are introduced in detail. Finally, a prototype circuit rated at 400W with a 42-50V input voltage and a 400V output voltage is built and tested to verify the effectiveness of theoretical analysis. Experimental results show that an efficiency of 95.3% can be achieved.