• 제목/요약/키워드: Counter-memory

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Enhancing RCC(Recyclable Counter With Confinement) with Cuckoo Hashing (Cuckoo Hashing을 이용한 RCC에 대한 성능향상)

  • Jang, Rhong-ho;Jung, Chang-hun;Kim, Keun-young;Nyang, Dae-hun;Lee, Kyung-Hee
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.41 no.6
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    • pp.663-671
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    • 2016
  • According to rapidly increasing of network traffics, necessity of high-speed router also increased. For various purposes, like traffic statistic and security, traffic measurement function should performed by router. However, because of the nature of high-speed router, memory resource of router was limited. RCC proposed a way to measure traffics with high speed and accuracy. Additional quadratic probing hashing table used for accumulating elephant flows in RCC. However, in our experiment, quadratic probing performed many overheads when allocated small memory space or load factor was high. Especially, quadratic requested many calculations in update and lookup. To face this kind of problem, we use a cuckoo hashing which performed a good performance in update and loop for enhancing the RCC. As results, RCC with cuckoo hashing performed high accuracy and speed even when load factor of memory was high.

A New Hardening Technique Against Radiation Faults in Asynchronous Digital Circuits Using Double Modular Redundancy (이중화 구조를 이용한 비동기 디지털 시스템의 방사선 고장 극복)

  • Kwak, Seong Woo;Yang, Jung-Min
    • Journal of Institute of Control, Robotics and Systems
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    • v.20 no.6
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    • pp.625-630
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    • 2014
  • Asynchronous digital circuits working in military and space environments are often subject to the adverse effects of radiation faults. In this paper, we propose a new hardening technique against radiation faults. The considered digital system has the structure of DMR (Double Modular Redundancy), in which two sub-systems conduct the same work simultaneously. Based on the output feedback, the proposed scheme diagnoses occurrences of radiation faults and realizes immediate recovery to the normal behavior by overriding parts of memory bits of the faulty sub-system. As a case study, the proposed control scheme is applied to an asynchronous dual ring counter implemented in VHDL code.

A Study on Engine Control System Using Micro-Computer (마이크로 컴퓨터를 이용한 차량용 엔진 제어에 관한 기초 연구)

  • 강기문;전병실;황준택
    • Journal of the korean Society of Automotive Engineers
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    • v.7 no.3
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    • pp.64-73
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    • 1985
  • In order to control ignition advance angle, this system is designed with Z-80 CPU, CTC (counter Timer Circuit), PIO(Parallel Input Output), A/D Converter and Memory, etc. Serial pulses from speed sensor and analog voltage from pressure sensor are converted to digital data. In order to reduce the error of ignition advance angle output, the reference of ignition advance angle output is set 56.25 before TDC(Top Dead Center). The table of ignition advance angle and program which have a main routine and subroutines are written into ROM ( 1 K-byte). The experimental result of this system is correspondent to the theoretical values of proposed ignition advance angle table. This system can be utilized to any other type of 4 cylinder vehicles for advance angle control by changing software.

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Implementation of a Direct Learning Control Law for the Trajectory Tracking Control of a Robot (로봇의 궤적추종제어를 위한 직접학습 제어법칙의 구현)

  • Kim, Jin-Hyoung;Ahn, Hyun-Sik;Kim, Do-Hyun
    • Proceedings of the KIEE Conference
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    • 2000.11d
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    • pp.694-696
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    • 2000
  • In this paper, the Direct Learning Control is applied to robot's trajectory tracking control to solve the problem that lies in the existing Iterative Learning Control(ILC) and the tracking Performance is analyzed and the better approach is searched using computer simulation and experiments. It is assumed that the Direct Learning Control(DLC) is saved onto memory basically after obtaining control input Profiles for several Periodic output trajectories using the ILC. In case the new output trajectory has special relations with the previous output trajectories, there is an advantage that the desired control input profile can be obtained without iterative executions only using the DLC. The robot's tracking control system is comprised of DSP chip. A/D converter, D/A converter and high-speed pulse counter included in the control board and the performance is examined by carrying out the tracking control for the given output trajectory.

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A design on the control of direct drive robot manipulator using TMS320c30 (TMS320c30을 이용한 직접 구동형 로보트 매뉴퓰레이터의 설계)

  • 손장원;이종수
    • 제어로봇시스템학회:학술대회논문집
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    • 1996.10b
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    • pp.520-522
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    • 1996
  • The Direct Drive Arm(DDA) is a SCARA typed direct drive manipulator with two degrees-of-freedom(DOF) using the direct drive motor of the NSK company. A controller system for the SCARA robot of DDA is designed using a DSP (TMS32Oc3O), which has the highest performance among the third DSP chips in the TI company. The design objective of the system is to implement dynamic control algorithms and neural control algorithms for real time learning which require a lot of calculations and large memory and have been tested only by simulations so far. The controller uses a DSP, a high speed D/A, 32-bit Counter and a large DRAM to implement advanced robot control algorithms.

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A VLSI implementation of 32-bit RISC embedded controller (내장형 32비트 RISC 콘트롤러의 VLSI 구현)

  • 이문기;최병윤;이승호
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.10
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    • pp.141-151
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    • 1994
  • this paper describes the design and implementation of a RISC processor for embedded control systems. This RISC processor integrates a register file, a pipelined execution unit, a FPU interface, a memory interface, and an instruction prefetcher. Its characteristics include both single cycle executions of most instructions in a 2 phase 20 MHz frequency and the worst case interrupt latency of 7 cycles with the vectored interrupt handling that makes it possible to be applicable to the real time processing system. For efficient handling of multi-cycle instructions, data stationary hardwired control scheme equippedwith cycle counter was used. This chip integrates about 139K transistors and occupies 9.1mm$\times$9.1mm in a 1.0um DLM CMOS technology. The power dissipation is 0.8 Watts from a 5V supply at 20 MHz operation.

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Time-Predictable Java Dynamic Compilation on Multicore Processors

  • Sun, Yu;Zhang, Wei
    • Journal of Computing Science and Engineering
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    • v.6 no.1
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    • pp.26-38
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    • 2012
  • Java has been increasingly used in programming for real-time systems. However, some of Java's features such as automatic memory management and dynamic compilation are harmful to time predictability. If these problems are not solved properly then it can fundamentally limit the usage of Java for real-time systems, especially for hard real-time systems that require very high time predictability. In this paper, we propose to exploit multicore computing in order to reduce the timing unpredictability that is caused by dynamic compilation and adaptive optimization. Our goal is to retain high performance comparable to that of traditional dynamic compilation, while at the same time, obtain better time predictability for Java virtual machine (JVM). We have studied pre-compilation techniques to utilize another core more efficiently, preoptimization on another core (PoAC) scheme to replace the adaptive optimization system (AOS) in Jikes JVM and the counter based optimization (CBO). Our evaluation reveals that the proposed approaches are able to attain high performance while greatly reducing the variation of the execution time for Java applications.

A Study on Voltammetry System Design for Realizing High Sensitivity Nano-Labeled Sensor of Detecting Heavy Metals (중금속 검출용 고감도 나노표지센서 구현을 위한 볼타메트리 시스템 설계 연구)

  • Kim, Ju-Myoung;Rhee, Chang-Kyu
    • Journal of Powder Materials
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    • v.19 no.4
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    • pp.297-303
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    • 2012
  • In this study, voltammetry system for realizing high sensitivity nano-labeled sensor of detecting heavy metals was designed, and optimal system operating conditions were determined. High precision digital to analog converter (DAC) circuit was designed to control applied unit voltage at working electrode and analog to digital converter (ADC) circuit was designed to measure the current range of $0.1{\sim}1000{\mu}A$ at counter electrode. Main control unit (MCU) circuit for controlling voltammetry system with 150 MHz clock speed, main memory circuit for the mathematical operation processing of the measured current value and independent power circuit for analog/digital circuit parts to reduce various noise were designed. From result of voltammetry system operation, oxidation current peaks which are proportional to the concentrations of Zn, Cd and Pb ions were found at each oxidation potential with high precision.

A Study On Bar-Code Signal Processing System (바-코드 신호처리 시스템에 관한 연구)

  • Ihm, J.T.;Eun, J.J.;Park, H.K.
    • Proceedings of the KIEE Conference
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    • 1987.07a
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    • pp.61-63
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    • 1987
  • In this paper, we develope a system which can perform signal processing for bar-code laser scanner. This system is composed of optical detector and preprocessor. The former detects the diffused light and converts it into TTL lebel output. The latter discriminator valid data from various raw data and transmits data to micro-processor. The preprocessor consists of edge transition detector, latch signal generator, module counter, register array, adder array, and buffer memory control circuit etc..

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Performance Counter Analysis for Effective Adaptive Load Balancing (효과적인 Adaptive Load Balancing을 위한 성능 지표 분석)

  • Lim, Yoo-Jin;Lee, Won-Q;Han, Young-Tae;Lee, Dong-Hoon;Choi, Eun-Mi
    • Annual Conference of KIPS
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    • 2002.11a
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    • pp.143-146
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    • 2002
  • 웹 서비스를 제공하는 분산 서버 시스템에서 각 서버의 부하 상태를 파악하여 처리해야 할 부하를 조절하여 주면 서버의 부하가 균등하게 되어 더 나은 성능을 얻을 수 있게 된다. 서버의 부하 상태는 시스템의 자원에 영향을 미치는 여러 가지 요소에 의하여 분석을 할 수 있다. 본 논문에서는 다양한 스트레스 테스트를 통하여 서버의 자원의 고갈을 나타내는 주요 성능 지표들을 변화 상태를 분석하였다. 고려된 성능지표로는 Available Memory 양, Page Read 수, Processor Utilization, Processor Queue Length, 네트웍으로 전달된 Transmitted Bytes, 연결된 Connection 개수이다. 실제로 이중 하나의 요소를 적용시켜서 ALBM (Adaptive Load Balancing Mechanism)을 실행을 하였을 때 일반 LVS Round Robin 보다 성능이 좋은 결과를 낳았다.

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