• Title/Summary/Keyword: Counter mode of operation

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The maneuvering characteristics of the research vessel NARA equipped with the azimuth thruster system (Azimuth thruster 시스템을 장착한 나라호의 조종성)

  • KIM, Jung-Chang;KANG, Il-Kwon;LEE, Jun-Ho;HAM, Sang-Jun;PARK, Chi-Wan;KIM, Su-Hyeng
    • Journal of the Korean Society of Fisheries and Ocean Technology
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    • v.53 no.3
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    • pp.276-285
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    • 2017
  • The research vessel NARA equipped with an azimuth thruster system was built in 2015. There are few vessels with this propulsion system in Korea. This vessel has two modes such as the normal for maneuvering and the power for investigation, and the other two modes as one axis and two axes on the operating. This type of vessels does not seem to have a clear grasp of the maneuvering character in comparison with the vessel with a conventional propulsion system. So the authors carried out the sea test for the turning, the zigzag and the inclination, and the results are as follows. In turning test, the case of using the two axes mode is much better than the case of using the one axis mode for the elements of turning, such as advance, transfer, tactical diameter and final diameter, but turning hard over the rudder in full speed is very vulnerable to capsize in both modes. In zigzag test, the yaw quicking responsibility index, T is very large excessively, which means a bad counter maneuvering ability, so an operator has to keep in mind that in turning operation. If necessary to avoid collision at head on situation, it may be a more effective method to use the crash astern stop than the turning according to the conditions and circumstances for the shortest stopping distance is very short.

Design of digitally controlled CMOS voltage mode DC-DC buck converter for high resolution duty ratio control (고해상도 듀티비 제어가 가능한 디지털 제어 방식의 CMOS 전압 모드 DC-DC 벅 변환기 설계)

  • Yoon, KwangSub;Lee, Jonghwan
    • Journal of IKEEE
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    • v.24 no.4
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    • pp.1074-1080
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    • 2020
  • This paper proposes a digitally controlled buck converter insensitive to process, voltage and temperature and capable of three modes of operation depending on the state of the output voltage. Conventional digital-controlled buck converters utilized A/D converters, counters and delay line circuits for accurate output voltage control, resulting in increasing the number of counter and delay line bits. This problem can be resolved by employing the 8-bit and 16-bit bidirectional shift registers, and this design technique leads a buck converter to be able to control duty ratio up to 128-bit resolution. The proposed buck converter was designed and fabricated with a CMOS 180 nano-meter 1-poly 6-metal process, generating an output voltage of 0.9 to 1.8V with the input voltage range of 2.7V to 3.6V, a ripple voltage of 30mV, and a power efficiency of up to 92.3%. The transient response speed of the proposed circuit was measured to be 4us.

Evaluation of Turbidity Removal Efficiency on under Flow Water by Pore Controllable Fiber Filtration (공극제어형 섬유사 여과기를 이용한 복류수의 탁도 제거효율 평가)

  • Kim, Jeong-Hyun;Bae, Chul-Ho;Kim, Chung-Hwan;Park, No-Suk;Lee, Sun-Ju;Anh, Hyo-Won;Huh, Hyun-Chul
    • Journal of Korean Society of Water and Wastewater
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    • v.19 no.2
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    • pp.135-143
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    • 2005
  • It was evaluated that the effect of turbidity removal by Pore Controllable Fiber Filter(PCF) installed in NS(Naksang) small water treatmant plant(system) using under flow water as raw water in the study. The results of the study are as the followings. Firstly, the removal efficiency of turbidity by PCF without coagulation(in operation mode not using coagulants) was mostly below 20 percent. On the other hand, when operation using proper coagulants, that of turbidity was mostly over 80 percent. Secondly, slow sand filtration after PCF, total turbidity removal efficiency of final treated water was 84.3 percent, and the contribution by PCF was 57.1 percent and that of slow sand filtration was 27.7 percent. Therefore the introduction of PCF as pre-treatment process would be helpful to reduce the loading of high turbidity of slow sand filtration. Thirdly, the results of particle counter measurements showed that when operated PCF with coagulants, fine flocs captured or adsorbed at the pore of PCF were flow out into the effluents from 120 minutes after backwashing because of the increase of headloss of PCF. Therefore the decision of backwashing time should made consideration into the outflow of fine flocs from PCF. Fourth, coagulant dosages on PCF at the same turbidity was largely variable because of the effect of the raw water characteristics and the turbidity increase velocity at rainy days, therefore flexible coagulant dosages should be considered rather than fixed coagulant dosage by the influent jar-test result.

Implementation of a Grant Processor for Upstream Cell Transmission at the ONU in the ATM-PON (ATM-PON의 ONU에서 상향 셀 전송을 위한 승인처리기의 구현)

  • 우만식;정해;유건일
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.5C
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    • pp.454-464
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    • 2002
  • In the ATM-PON (Asynchronous Transfer Mode-Passive Optical Network), the downstream cell transmitted by an OLT is broadcast to all ONUs. The ONU receives selectively its own cells by VP filtering. On the other hand, the upstream cell can be transmitted by ONU in the case of receiving a grant from the OLT. After providing the grant to an ONU, the OLT expects the arrival of a cell after an elapse of the equalized round trip delay. ITU-T G.983.1 recommends that one bit error is allowed between the expected arrival time and the actual arrival time at the OLT. Because the ONU processes the different delay to each type of grant (ranging, user cell, and mimi-slot grant), it is not simple to design the transmission part of ONU. In this paper, we implement a grant processor which provides the delay accurately in the ONU TC chip with the FPGA. For the given equalized delay, it deals with the delay for the cell, the byte, and the bit unit by using the shift register, the byte counter, and the D flip-flop, respectively. We verify the operation of the grant processor by the time simulation and the measurement of the optical board output.

Balanced DQDB Applying the System with Cyclic Service for a Fair MAC Procotol (공정한 MAC 프로토콜을 위해 순환서비스시스템을 적용한 평형 DQDB)

  • 류희삼;강준길
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.18 no.12
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    • pp.1919-1927
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    • 1993
  • A new MAC protocol has been proposed and analysed to relieve the unfairness problems exhibited by the basic version of the DQDB standard. DQDB MAC protocol has the unfairness problems in throughputs. message delay and so or. And when the slots are reused or the file transmissions takes long, the unfairness problems in the system become worse. The new access protocol proposed here, which of called the Balanced DQDB, guarantees a fair bandwidth distribution by using one bit of the dual bus network protocol and keeps up all characteristics of DQDB. the DQDB analysis model introduced by Wen Jing, et al, was considered to analyse a sequential balance distribution of solts. And the probabilities of the empty in operation mode were represented to determine the probabilities for busy bits to generate on each node of the bus using the Markov chain. Through the simulations. the performances of the proposed Balanced DQDB and that of the standard DQDB of the BWB mechanism were compared at the state that the values of the RQ or CD counter on each node varied dynamically. As the results, it is shown that the Balanced DQDB has the decrement of throughputs in upstream, but the numbers of the used empty slots at each node of the Balanced DQDB had more than that of the others because the Balanced DQDB has over 0.9 throughputs in the 70~80% nodes of total node and it has constant throughputs at each node. And there results were analogous to that of the analytical model.

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