• Title/Summary/Keyword: Cost optimization design

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A study on the feasibility evaluation technique of urban utility tunnel by using quantitative indexes evaluation and benefit·cost analysis (정량적 지표평가와 비용·편익 분석을 활용한 도심지 공동구의 타당성 평가기법 연구)

  • Lee, Seong-Won;Chung, Jee-Seung;Na, Gwi-Tae;Bang, Myung-Seok;Lee, Joung-Bae
    • Journal of Korean Tunnelling and Underground Space Association
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    • v.21 no.1
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    • pp.61-77
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    • 2019
  • If a new utility tunnel is planned for high density existing urban areas in Korea, a rational decision-making process such as the determination of optimum design capacity by using the feasibility evaluation system based on quantitative evaluation indexes and the economic evaluation is needed. Thus, the previous study presented the important weight of individual higher-level indexes (3 items) and sub-indexes (16 items) through a hierarchy analysis (AHP) for quantitative evaluation index items, considering the characteristics of each urban type. In addition, an economic evaluation method was proposed considering 10 benefit items and 8 cost items by adding 3 new items, including the effects of traffic accidents, noise reduction and socio-economic losses, to the existing items for the benefit cost analysis suitable for urban utility tunnels. This study presented a quantitative feasibility evaluation method using the important weight of 16 sub-index items such as the road management sector, public facilities sector and urban environment sector. Afterwards, the results of quantitative feasibility and economic evaluation were compared and analyzed in 123 main road sections of the Seoul. In addition, a comprehensive evaluation method was proposed by the combination of the two evaluation results. The design capacity optimization program, which will be developed by programming the logic of the quantitative feasibility and economic evaluation system presented in this study, will be utilized in the planning and design phases of urban community zones and will ultimately contribute to the vitalization of urban utility tunnels.

Optimal Design of Satellite Constellation Korean Peninsula Regions (한반도 지역의 효율적인 관측을 위한 최적의 위성군 설계)

  • Kim, Nam-Kyun;Park, Sang-Young;Kim, Young-Rok;Choi, Kyu-Hong
    • Journal of Astronomy and Space Sciences
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    • v.25 no.2
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    • pp.181-198
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    • 2008
  • Designing satellite constellations providing partial coverage of certain regions becomes more important as small low-altitude satellites receives an increasing attention due to its cost-effectiveness analysis. Generally, Walker's method is a standard constellation method for global coverage but not effective for partial coverage. The purpose of this study is to design optimal constellation of satellites for effective observation in Korean peninsula regions. In this study, a new constellation design method is presented for partial coverage, using direct control of satellites' orbital elements. And also, a ground repeating circular orbit is considered for each satellite's orbit with the Earth oblateness effect. As the results, at least four satellites are required to observe the Korean peninsula regions effectively when minimum elevation angle is assumed as 12 degrees. The results from new method are better than those from the best Walker method. The proposed algorithm will be useful to design satellite constellation missions of Korea in future.

A VLSI Design of High Performance H.264 CAVLC Decoder Using Pipeline Stage Optimization (파이프라인 최적화를 통한 고성능 H.264 CAVLC 복호기의 VLSI 설계)

  • Lee, Byung-Yup;Ryoo, Kwang-Ki
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.46 no.12
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    • pp.50-57
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    • 2009
  • This paper proposes a VLSI architecture of CAVLC hardware decoder which is a tool eliminating statistical redundancy in H.264/AVC video compression. The previous CAVLC hardware decoder used four stages to decode five code symbols. The previous CAVLC hardware architectures decreased decoding performance because there was an unnecessary idle cycle in between state transitions. Likewise, the computation of valid bit length includes an unnecessary idle cycle. This paper proposes hardware architecture to eliminate the idle cycle efficiently. Two methods are applied to the architecture. One is a method which eliminates an unnecessary things of buffers storing decoded codes and then makes efficient pipeline architecture. The other one is a shifter control to simplify operations and controls in the process of calculating valid bit length. The experimental result shows that the proposed architecture needs only 89 cycle in average for one macroblock decoding. This architecture improves the performance by about 29% than previous designs. The synthesis result shows that the design achieves the maximum operating frequency at 140Mhz and the hardware cost is about 11.5K under a 0.18um CMOS process. Comparing with the previous design, it can achieve low-power operation because this design is implemented with high throughputs and low gate count.

A study on the research scheme and the education of e-trade marketing in Korea (전자무역 해외마케팅 교육과 연구체계 수립에 관한 연구)

  • Kang, Hyo-Won
    • International Commerce and Information Review
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    • v.15 no.3
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    • pp.411-430
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    • 2013
  • Overseas marketing before the conclusion of a contract is a huge obstacle to enter the global market because it has needed the company's maximum capacities which are some cost, time and human resources. Thus it required a reestablishment about the education fields and research schemes. Due to the advancements in ICT and internet, a subject of e-trade is becoming a critical issue with a subject of a practice of international trade. However, since the mid-2000s, e-trade research articles and educational materials such as textbooks, research papers are being gradually reduced. Therefore the purpose of this study, from an oversea marketing point of view among the various e-trade fields, is to measure an education performance and an academic research scheme. And this study will suggest direction of improvement about research scheme and educational performance in the overseas marketing. According to the result, to establish the education and research scheme about SEM(Search Engine Marketing), SEO(Search Engine Optimization) and SNA(Social Network Analysis) which are introduced in the industry among the education and research field related the e-trade is urgent. And some subjects need a capstone-design reconcile theory and practice.

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Structural Analysis of the Aluminum Extrusion Plate with Truss-Core (트러스 코어 헝상을 갖는 알루미늄 압출재의 구조 해석)

  • 장창두;이병삼;하윤석;김호경;송하철;문형석
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.16 no.2
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    • pp.133-140
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    • 2003
  • The sandwich plate has been widely used as an efficient structural member because it has high strength-to-weight and high stiffness-to-weight ratios. To properly design the aluminum extrusion plate , it is necessary to analyze structural behaviors of the extrusions, however, the aluminum extrusions have been rarely studied until now. In the optimization process through numerous iterative calculations, finite element analysis of the sandwich plate with hollow core section requires a considerable amount of computation time and cost. In this paper, the aluminum extrusion plate with truss-core is transformed into an equivalent homogeneous orthotropic plate with appropriate elastic constants. The procedure to evaluate accurate equivalent elastic constants is also established. Using these elastic constants, simple theoretical formulas of the stresses and deflection are proposed in case of the simply-supported orthotropic thick plate under uniform pressure. Through the comparison with the results by commercial FEM code(ANSYS), it is verified that the proposed simpified formula has a good efficiency and accuracy.

Utilization of machining templates to improve 5-axis CAM machining process (5축 CAM 가공 작업 프로세스 개선을 위한 가공 템플릿 활용)

  • Lee, Dong-Cheon;Kim, Seon-Yong
    • Design & Manufacturing
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    • v.11 no.1
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    • pp.45-49
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    • 2017
  • Currently, a lot of efforts to make increases the manufacturing efficiency have tried and there is growing the interest to implementing the machining operation through CAM automation and optimization. This kind of movement has shown gradually in 5X milling as well as 3X milling task. By the way, in case of 5X milling, it is difficult to hire the CAM experts who is an experience for 5X machining and also it has too big trouble to use them due to high cost. For this reason, you can see the manufacturer who is concern the CAM S/W to provide the NC automation program that beginners can generate easily the 5X milling in short term and the existing 5X milling process can be improved. These requirements need to make a NC automation process including the practical machining strategies same as the generation by NC expert. In order to support this, it is necessary to directly apply the 3D machining part based on NC template which includes the machining procedures, standard cutter library, auto machine area selection, analyze tool for part shape, machining condition setting considering the material stiffness to be provided by CimatronE and it should be created the 5axis machining data by a minimized operation. With user-friendly, CimatronE's NC machining automation tools improve the 5-axis machining process and speed up the process, maximizing work efficiency and improving product productivity compared to existing machining tasks.

Low Thrust, Fuel Optimal Earth Escape Trajectories Design (저추력기를 이용한 연료 최적의 지구탈출 궤적 설계 연구)

  • Lee, Dong-Hun;Bang, Hyo-Choong
    • Journal of the Korean Society for Aeronautical & Space Sciences
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    • v.35 no.7
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    • pp.647-654
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    • 2007
  • A Discrete continuation Method/homotopy approaches are studied for energy/fuel optimal low thrust Earth escape trajectory by solving a two point boundary value problem(TPBVP). Recently, maneuvers using low thrust propulsion system have been identified as emerging technologies. The low thruster is considered as the main actuator for orbit maneuvers. The cost function consists of a energy/fuel consumption function, and constraints are position and velocity vectors at the terminal escape point. Solving the minimum energy/fuel problem directly is not an easy task, so we adopt the homotopy analysis. Using a solution of the minimum energy, which is solved by discrete continuation method, we obtain the solution of the minimum fuel problem.

Development of Smart-phone based Thermal Imaging Diagnostic System for Monitoring Disc Pads of Crane (크레인 디스크 패드 모니터링을 위한 스마트폰 기반의 열영상 진단 시스템 개발)

  • Oh, Yeon-Jae;Park, Kyoung-Wook;Kim, Eung-Kon
    • The Journal of the Korea institute of electronic communication sciences
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    • v.9 no.12
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    • pp.1397-1404
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    • 2014
  • Grab cranes are used for multi-purpose when the sand and soil are deposited into harbor wharf or the undersea construction is performed. Among the components of crane grab, the wire drum and disc brake pad are key expendables and have disadvantages that lot of heat is generated and very expensive when replacing them. In this study, the thermal image analysis for the disc brake, which works with wire drum of the crane is suggested. The suggested system performs the pad thermal diagnosis through the thermal image using the characteristics that the disc and pad surface temperatures are distributed abnormally before the brake failure and the disc pad damage. Therefore, the damage by the failure can be prevented by discovering the abnormality of the machine parts before failure and the life cycle of the pad and the cost can be extended and saved by operating the crane performing constant checkup for the overload.

Delay Optimization Algorithm for the High Speed Operation of FPGAs (FPGA를 고속으로 동작시키기 위한 지연시간 최적화 알고리듬)

  • Choi, Ick-Sung;Lee, Jeong-Hee;Lee, Bhum-Cheol;Kim, Nam-U
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.7
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    • pp.50-57
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    • 2000
  • We propose a logic synthesis algorithm for the design of FPGAs operating at high speed. FPGA is a novel technology that provides programmability in the field. Because of short turnaround time and low manufacturing cost, FPGA has been noticed as an ideal device for system prototyping. Despite these merits, FPGA has drawbacks, namely low integration and long delay time comparing to ASIC. The proposed algorithm partitions a given circuit into subcircuits utilizing a kernel divisor such that the subcircuits can be performed at the same time, hence reducing the delay of the circuit. Experimental results on the MCNC benchmark show that the proposed algorithm is effective by generating circuits having 19.1% les delay on average, when compared to the FlowMap algorithm.

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Design of Low-Complexity 128-Bit AES-CCM* IP for IEEE 802.15.4-Compatible WPAN Devices (IEEE 802.15.4 호환 WPAN 기기를 위한 낮은 복잡도를 갖는128-bit AES-CCM* IP 설계)

  • Choi, Injun;Lee, Jong-Yeol;Kim, Ji-Hoon
    • Journal of IKEEE
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    • v.19 no.1
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    • pp.45-51
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    • 2015
  • Recently, as WPAN (Wireless Personal Area Network) becomes the necessary feature in IoT (Internet of Things) devices, the importance of data security also hugely increases. In this paper, we present the low-complexity 128-bit AES-$CCM^*$ hardware IP for IEEE 802.15.4 standard. For low-cost and low-power implementation which is essentially required in IoT devices, we propose two optimization methods. First, the folded AES(Advanced Encryption Standard) processing core with 8-bit datapath is presented where composite field arithmetic is adopted for reduced hardware complexity. In addition, to support $CCM^*$ mode defined in IEEE 802.15.4, we propose the mode-toggling architecture which requires less hardware resources and processing time. With the proposed methods, the gate count of the proposed AES-$CCM^*$ IP can be lowered up to 57% compared to the conventional architecture.