• Journal of Mechanical Science and Technology
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• v.15 no.1
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• pp.125-138
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• 2001

An efficient correction storage scheme on a structured grid is applied to a sequence of approximate Jacobian systems arising at each time step from a linearization of the discrete nonlenear system of equations, obtained by the implicit time discretization of the conservation laws for unsteady fluid flows. The contribution of freezing the Jacobian matrix to computing costs is investigated within the correction storage scheme. The performance of the procedure is exhibited by measuring CPU time required to obtain a fully developed laminar vortex shedding flow past a circular cylinder, and is compared with that of a collective iterative method on a single grid. In addition, some computed results of the flow are presented in terms of some functionals along with measured data. The computational test shows that the computing costs may be saved in favor of the correction storage scheme with the frozen Jacobian matrix, to a great extent.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1211-1222
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• 2018

This study presents a power distribution control scheme for a three-phase interleaved parallel DC/DC converter in a battery energy storage system. To extend battery life and increase the power equalization rate, a control method based on the nth order of the state of charge (SoC) is proposed for the charging and discharging processes. In the discharging process, the battery sets with high SoC deliver more power, whereas those with low SoC deliver less power. Therefore, the SoC between each battery set gradually decreases. However, in the two-stage charging process, the battery sets with high SoC absorb less power, and thus, a power correction algorithm is proposed to prevent the power of each particular battery set from exceeding its rated power. In the simulation performed with MATLAB/Simulink, results show that the proposed scheme can rapidly and effectively control the power distribution of the battery sets in the charging and discharging processes.

• Convergence Security Journal
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• v.19 no.3
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• pp.61-70
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• 2019

Recently, developments on quantum computers and cloud computing have been actively conducted. Quantum computers have been known to show tremendous computing power and Cloud computing has high accessibility for information and low cost. For quantum computers, quantum error correcting codes are essential. Similarly, cloud computing requires homomorphic encryption to ensure security. These two techniques, which are used for different purposes, are based on similar assumptions. Then, there have been studies to construct quantum homomorphic encryption based on quantum error correction code. Therefore, in this paper, we propose a scheme which can process the homomorphic encryption like quantum computation by modifying the QECCs. Conventional quantum homomorphic encryption schemes based on quantum error correcting codes does not have error correction capability. However, using the proposed scheme, it is possible to process the homomorphic encryption like quantum computation and correct the errors during computation and storage of quantum information unlike the homogeneous encryption scheme with quantum error correction code.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39A no.10
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• pp.569-573
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• 2014

Holographic data storage is a strong contender to become the next-generation data storage method. Its major weaknesses are two-dimensional intersymbol interference between neighboring pixels and interpage interference caused by storing multiple pages in a single volume of hologram. In this paper, we present a trellis encoding scheme of 6/8 balanced modulation code, to address the two weaknesses. The proposed modulation coding scheme captures on characteristics of the balanced code: the scheme relaxes IPI and enables error correction by exploiting the trellis structure. The proposed method showed improved SNR over the conventional 6/8 modulation code.

• Journal of information and communication convergence engineering
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• v.5 no.4
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• pp.362-368
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• 2007

A single-phase uninterruptible power supply system equipped with a superconducting magnet energy storage unit is proposed to achieve a simple circuit configuration and higher system reliability. It reduces a number of switching devices by applying a common-arm scheme. Removing some switches or substituting passive elements for active switches can increase the sophistication and reduces degree of freedom in control strategy. However, high-performance DSP controller can execute the complicated control task with no additional cost. Operational principles to normal, stored-energy, and bypass mode are discussed in detail. The validity of the proposed system is verified by experimental results.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.252-257
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• 1998

Two-stage power factor correction (PFC) converter with a single PWM controller for universal input voltage (90-264V) is proposed. It consists of a power factor pre-regulator cascaded by a DC/DC converter as in a conventional two-stage approach. However, a single PWM controller is used as in a single-stage, single-switch PFC approach. The switch in the PFC part is synchronized with the switch in the DC/DC converter with a fixed switching frequency. Employing an adaptive delay scheme the switch in the PFC part is controlled to limit the energy storage capacitor voltage within a designed range for the optimum efficiency, and to reduce input current harmonic distortion. The experimental results obtained on a 200W (5V/40A) prototype PFC converter are given to verify the effectiveness of the proposed control method.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.12C
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• pp.1014-1020
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• 2008

Storage devices such as memories are widely used in various electronic products. They require high-density memory and currently the data has been stored in multi-level format, that results in high error rate. In this paper, we apply error correction schemes that are widely used in communication system to the storage devices for satisfying low bit error rate and high code rate. In A WGN channel with average BER $10^{-5}$ and $5{\times}10^{-6}$, we study error correction schemes for 4-1evel cell to achieve target code rate 0.99 and target BER $10^{-11}$ and $10^{-13}$, respectively. Since block codes may perform better than the concatenated codes for high code rate, and it is important to use less degraded inner code even when many bits are punctured. The performance of concatenated codes using general feedforward systematic convolutional codes are worse than the block code only scheme. The simulation results show that RSC codes must be used as inner codes to achieve good performance of punctured convolutional codes for high code rate.

• Journal of the Korean Society of Combustion
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• v.6 no.2
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• pp.15-22
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• 2001

A pressure-based, unstructured finite volume method has been applied to couple the chemical kinetics and fluid dynamics and to capture effectively and accurately the steep gradient flame field. The pressure-velocity coupling is handled by two methodologies including the pressure-correction algorithm and the projection scheme. A stiff, operator-split projection scheme for the detailed nonequilibrium chemistry has been employed to treat the stiff reaction source terms. The conservative form of the governing equations are integrated over a cell-centered control volume with collocated storage for all transport variables. Computations using detailed chemistry and variable transport properties were performed for two laminar reacting flows: a counterflow hydrogen-air diffusion flame and a lifted methane-air triple flame. Numerical results favorably agree with measurements in terms of the detailed flame structure.

• Journal of the Korea Society of Computer and Information
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• v.25 no.1
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• pp.29-36
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• 2020

Wear-leveling techniques and Error Correction Codes (ECCs) are essential for the improvement of the reliability and durability of flash memories. Low-Density Parity-Check (LDPC) codes have higher error correction capabilities than conventional ECCs and have been applied to various flash memory-based storage devices. Conventional wear-leveling schemes using only the number of Program/Erase (P/E) cycles are not enough to reflect the actual aging differences of flash memory components. This paper introduces an actual aging measurement scheme for flash memory wear-leveling using LDPC decoding information. Our analysis, using error-rates obtained from an flash memory module, shows that LDPC decoding information can represent the aging degree of each block. We also show the effectiveness of the wear-leveling based on the proposed scheme through wear-leveling simulation experiments.

• Journal of KIISE:Databases
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• v.37 no.6
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• pp.315-323
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• 2010

In Wireless Sensor Networks (WSNs), various Data-Centric Storages (DCS) schemes have been proposed to store the collected data and to efficiently process a query. A DCS scheme assigns distributed data regions to sensor nodes and stores the collected data to the sensor which is responsible for the data region to process the query efficiently. However, since the whole data stored in a node will be lost when a fault of the node occurs, the accuracy of the query processing becomes low, In this paper, we propose an in-network aggregation query processing method that assures the high accuracy of query result in the case of data loss due to the faults of the nodes in the DCS scheme. When a data loss occurs, the proposed method creates a compensation model for an area of data loss using the linear regression technique and returns the result of the query including the virtual data. It guarantees the query result with high accuracy in spite of the faults of the nodes, To show the superiority of our proposed method, we compare E-KDDCS (KDDCS with the proposed method) with existing DCS schemes without the data-loss correction method. In the result, our proposed method increases accuracy and reduces query processing costs over the existing schemes.