• Journal of Power Electronics
• /
• 제17권3호
• /
• pp.686-694
• /
• 2017

Due to the wide use of electronic products, digitally controlled DC-DC converters are attracting more and more attention in recent years. However, digital control strategies may introduce undesirable Limit Cycle Oscillation (LCO) due to quantization effects in the Analog-to-Digital Converter (ADC) and Digital Pulse Width Modulator (DPWM). This results in decreases in the quality of the output voltage and the efficiency of the system. Meanwhile, even if the resolution of the DPWM is finer than that of the ADC, LCO may still exist due to improper parameters of the digital compensator. In order to discover how LCO is generated, the state space averaging model is applied to derive equilibrium equations of a digital PID controlled DC-DC converter in this paper. Furthermore, the influences of the parameters of the digital PID compensator, and the resolutions of the ADC and DPWM on LCO are studied in detail. The amplitude together with the period of LCO as well as the corresponding PID parameters are obtained. Finally, MATLAB/Simulink simulations and FPGA verifications are carried out and no-LCO conditions are obtained.

• 전자공학회논문지
• /
• 제53권1호
• /
• pp.139-144
• /
• 2016

본 논문은 가변 스위칭 주파수 PFM을 이용한 DC-DC 변환기의 집적회로 개발 시, 적용 가능한 주요 기능 블록의 설계에 관한 것이다. DC전압 변환 시 부하에 공급되는 전류가 작거나 출력전압이 설정값 근처에 도달했을 때 PFM 모드로 동작시켜 전력변환 효율을 높일 수 있다. PFM DC-DC 변환기 구현에 필요한 PFM 신호 발생회로, PFM 주파수 제어기, 출력전압감지회로 그리고 과전류보호회로를 설계하였다. 설계를 위한 공정파라미터는 내압 12[V], 최소선폭 $0.35[{\mu}m]$, 2P_2M CMOS 공정을 사용하였다.

• 한국초전도저온공학회:학술대회논문집
• /
• 한국초전도저온공학회 2002년도 학술대회 논문집
• /
• pp.131-134
• /
• 2002

In this work, we have developed a systematic way of utilizing the basic design tools for superconductive electronics. This include WRSPICE, XIC, margin program, and L-meter. Since the high performance analog-to- digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Single Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an 1-bit analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. Based on this circuit we performed margin calculations of the designed circuits and optimized circuit parameters. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter. Circuit inductors were adjusted according to these calculations and the final layout was obtained.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 1998년도 하계종합학술대회논문집
• /
• pp.847-850
• /
• 1998

One of the most difficult problem of designing VLSI is a mixed-circuit design, that is to design circuit containing both analog parts and digital parts. Digital to analog converter and analog to digital converter is a typical case. Especially it can be a serious problem when mixed circuit are put into a large digital circuit like microcontroller. However nowadays this problem is settled by separating analog circuit parts outside the IC. This technique is based on converting a digital signal into a pulse sequence. Then an analog signal is obtained by averaging this pulse sequence at the external low-pass filter. An anlog to digital converter is designed using a stochastic logic instead of a traditional PWM (pulse-width modulation) signal and ins implemente dusing FPGa. Stochastic pulse sequence can be made as a simple circuits and moreover can be mathematically processed by simple circuits -AND gates. The spectral property of stochastic pulse sequence method is better than that of PWM method. So it make easy to design a external low-pass filter. This technique has important advantages, especially the reduction of the ADC cost.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2007년도 하계학술대회 논문집
• /
• pp.126-128
• /
• 2007

This paper presents a new soft switching dc-to-dc converter that employs IM transformer. Detailed analysis and design considerations of the proposed circuits are presented. By applying the proposed magnetic integration procedure, new integrated magnetic circuits featuring low loss, simple structure are then developed to overcome the limitations of prior art. Consequently, the power loss and the size of the integrated magnetic device are greatly reduced. The operation and performance of the proposed converter are demonstrated with an experimental converter that delivers a 5V/5A output from a 48V input at the maximum efficiency of 90 %.

• Journal of Power Electronics
• /
• 제9권5호
• /
• pp.772-780
• /
• 2009

A novel soft-switching two-switch flyback converter is proposed in this paper. This converter is composed of two active power switches, a flyback transformer, a blocking diode, and two passive regenerative clamping circuits. The proposed converter has the advantages of a low cost circuit configuration, a simple control scheme, a high efficiency, and a wide operating range. The circuit topology, analysis, design considerations, and experimental results of the new flyback converter are presented.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2010년도 하계학술대회 논문집
• /
• pp.489-490
• /
• 2010

A novel soft-switching two-switch flyback converter is proposed in this paper. This converter is composed of two active power switches, a flyback transformer, and two passive regenerative clamping circuits.The proposed converter has the advantages of a low cost circuit configuration, a simple control scheme, a high efficiency, and a wide operating range. The circuit topology and experimental results of the new flyback converter are presented.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2003년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
• /
• pp.270-272
• /
• 2003

Switching power supplies are widely used in many industrial fields. Power factor correction(PFC) circuits have tendency to be applied in new power supply designs. The input active power factor correction(APFC) circuits can be implemented using either the two-stage approach or the single-stage approach. The single-stage PFC circuit has advantage to reduce the number of components by eliminating a need for the PFC switch and control circuit. However, unlike in the two-stage approach, the do voltage on the energy storage capacitor in a single-stage PFC circuit is not well regulated. As a result. in universal line application($90{\sim}265Vac$), the storage capacitor voltage varies with the load and line variation. In this paper, the performance of output voltage regulation and transient response are clarified here. The validity of designed boost PFC circuit is confirmed by MATLAB simulation and experimental results of 2 [kW] prototype converter.

• 한국조명전기설비학회:학술대회논문집
• /
• 한국조명전기설비학회 2003년도 학술대회논문집
• /
• pp.311-314
• /
• 2003

In this paper, proposed circuit proposes that Active-Clamp-Circuits basis of a current-fed inverter linked type high frequency resonant dc-dc converter of conventional. and the paper the most of characteristics of the reduced high voltage stress main switches with active clamp circuits and output current constant with the resonant part consists of L, C resonant tank circuit. Also, the capacitor (C$_1$, C$_2$) connected in switches are a common using by resonance capacitor and ZVS capacitor. and circuit analysis used state equation of each part modes. Also we conform a rightfulness theoretical analysis by comparing a parameters values and simulation values obtained from simulation using Power MOS-FET as switching devices.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2003년도 추계학술대회 논문집 전기기기 및 에너지변환시스템부문
• /
• pp.227-231
• /
• 2003

In This paper, A novel zero-voltage-switching(ZVS) resonant DC-DC converter is proposed. it is composed of two symmetrical active-clamped circuits, The converter can achieve each switchs ZVS. proposed circuit is active clamp capacitor Ratios can be reduce switching voltage stress of each main switch. Simulation results using Pspice ver 9.2 show that the prove the validity of theoretical analysis.