• Title/Summary/Keyword: Conversion Network

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Calculation of Effective Receiving Electric Field Level using the Measurement Analysis from Actual Domestic DTV Environment (국내 디지털 TV방송 환경 측정결과 분석을 통한 효과적인 수신전계강도 산출)

  • Choi, Sung-Woong;Lee, Kyung-Ryang;Yang, Chung-Mo;Kim, Seong-Kweon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.35 no.7A
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    • pp.725-730
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    • 2010
  • Preparing the conversion to the digital broadcasting system, we are deciding broadcasting network plan and interference protection area, using the measured receiving electric field level from the digital broadcasting station. However, the essential researches are needed about a receiving electric field level, because a digital TV (DTV) broadcasting receiver has been improved and an actual receiving environment should be considered. In this paper, the measured data were classified with domestic terrain of line of sight (LOS) and those of non-LOS, and effective receiving electric field level was proposed based on the LOS data. It is known that receiving electric field-level of 48 ㏈uV/m or more should be required for receiving rate of 90% and 50 ㏈uV/m for that of 95%, on the basis of the information of domestic terrain LOS.

An 8b 52 MHz CMOS Subranging A/D Converter Design for ISDN Applications (광대역 종합 통신망 응용을 위한 8b 52 MHz CMOS 서브레인징 A/D 변환기 설계)

  • Hwang, Sung-Wook;Lee, Seung-Hoon
    • Journal of IKEEE
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    • v.2 no.2 s.3
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    • pp.309-315
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    • 1998
  • This paper describes an 8b 52 MHz CMOS subranging analog-to-digital converter (ADC) for Integrated Services Digital Network (ISDN) applications. The proposed ADC based on the improved time-interleaved architecture removes the holding time which is typically observed in the conventional double-channel subranging ADCs to increase throughput rate. Moreover, the ADC employs the interpolation technique in the back-end subranging ADCs far residue signal processing to minimize die area and power consumption. The fabricated and measured prototype ADC in a 0.8 um n-well double-poly double-metal CMOS process typically shows a 52 MHz sampling rate at a 5 V supply voltage with 230 mW, and a 40 MHz sampling rate at a 3 V power supply with 60 mW power consumption.

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A STUDY ON THE RELIABILITY OF THE DAEJEON HARDWARE CORRELATOR FOR THE KVN OBSERVATION MODES (KVN 관측모드별 대전상관기의 상관결과 고찰)

  • OH, SE-JIN;ROH, DUK-GYOO;YEOM, JAE-HWAN;OH, CHUNG-SIK;LEE, SANG-SUNG;JUNG, DONG-KYU;KIM, HYO-RYOUNG;CHUNG, HYUN-SOO
    • Publications of The Korean Astronomical Society
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    • v.31 no.2
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    • pp.11-19
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    • 2016
  • This paper presents the results of test observations toward a point source, 4C39.25, for observation modes with various bandwidths and numbers of IF streams in order to examine a reliability of the Daejeon hardware correlator performance for correlating VLBI (Very Long Baseline Interferometry) data obtained with the several observation modes of the KVN (Korean VLBI Network). We used a DiFX software correlator (DiFX) as a reference, for investigating the output visibilities from the Daejeon corelator. It is found that the band shapes of the output visibilities from two correlators are similar to each other and the correlated flux density for each baseline obtained from the Daejeon hardware correlator is lower by 3 - 7% than that from the DiFX. The flux difference is attributed to the limitation of FPGA resources and the difference of fringe rotation algorithm of the Daejeon hardware correlator. The conversion factor, 0.93 ~ 0.97, is proposed for future correlation with the Daejeon hardware correlator.

Modeling and Analysis of Control Scheme for Voltage Source Inverter Based Grid-connection of Wind Turbine (전압원인버터를 이용한 계통연계형 풍력발전의 출력제어 모의 및 해석)

  • 김슬기;김응상
    • Journal of Energy Engineering
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    • v.12 no.2
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    • pp.154-163
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    • 2003
  • Grid connection essentially requires a wind energy conversion system (WECS) to not only supply adequate power responding to constantly varying wind speed but also provide a specified level of voltage magnitude and frequency that is acceptable in the electric power network. To satisfy such requirements, appropriate control schemes of a wind turbine to be connected to the power grid should be employed. This paper presents an output control strategy of a grid-connected wind power generation, which consists of a fixed-pitch wind turbine, a synchronous generator and a AC-DC-AC component with a voltage source inverter built in, and performs modelling and analysis of the strategy using PSCAD/EMTDC, an electromagnetic transient analysis software. Real power output control of the voltage source inverter is implemented to extract the maximum energy from wind speed inputted through wind blades and reactive power control, to keep the terminal voltage of WECS at a specific level. SPWM switching method is used to reduce the harmonics and maintain 60 ㎐ of the output frequency. The wind turbine performance and output corresponding to wind variation and the terminal load change is simulated and analysed.

Toward Optimal FPGA Implementation of Deep Convolutional Neural Networks for Handwritten Hangul Character Recognition

  • Park, Hanwool;Yoo, Yechan;Park, Yoonjin;Lee, Changdae;Lee, Hakkyung;Kim, Injung;Yi, Kang
    • Journal of Computing Science and Engineering
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    • v.12 no.1
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    • pp.24-35
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    • 2018
  • Deep convolutional neural network (DCNN) is an advanced technology in image recognition. Because of extreme computing resource requirements, DCNN implementation with software alone cannot achieve real-time requirement. Therefore, the need to implement DCNN accelerator hardware is increasing. In this paper, we present a field programmable gate array (FPGA)-based hardware accelerator design of DCNN targeting handwritten Hangul character recognition application. Also, we present design optimization techniques in SDAccel environments for searching the optimal FPGA design space. The techniques we used include memory access optimization and computing unit parallelism, and data conversion. We achieved about 11.19 ms recognition time per character with Xilinx FPGA accelerator. Our design optimization was performed with Xilinx HLS and SDAccel environment targeting Kintex XCKU115 FPGA from Xilinx. Our design outperforms CPU in terms of energy efficiency (the number of samples per unit energy) by 5.88 times, and GPGPU in terms of energy efficiency by 5 times. We expect the research results will be an alternative to GPGPU solution for real-time applications, especially in data centers or server farms where energy consumption is a critical problem.

An Enhanced Motion Vector Composition Scheme of the Frame-Rate Control Transcoder (프레임률 조절 트랜스코더의 개선된 움직임 벡터 합성 기법)

  • Lee Seung Won;Park Seong Ho;Chung Ki Dong
    • Journal of KIISE:Computing Practices and Letters
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    • v.11 no.1
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    • pp.50-61
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    • 2005
  • To provide adaptively video streaming services on network environment, video transcoding is introduced. The one of transcoding methods is the frame-rate conversion. it needs a re-estimation about a motion vector of the frame to refer a skipping frame. This re-estimation makes higher the computational complexity in video transcoding. To reduce the computational complexity of a motion vector refinement, this paper proposes a region & activity based motion vector composition scheme that refine the moving vector of a skipping frame. This scheme composes each motion vector from the weight based on the activity information of a macroblock and the site of the overlapped area. The experiment result shows that RABVC has a higher PSNR than the value of existing weight-based motion vector selection schemes though the computational complexity of our scheme is similar to that of other schemes.

Urban-Rural Exchange through Rural-studying Programs in Japan and its Possibility of Application in Korea (일본의 산촌유학을 통한 도농교류의 실태 및 국내적용 가능성 모색)

  • Jeong, Hwan-Yeong
    • Journal of the Korean association of regional geographers
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    • v.16 no.6
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    • pp.635-652
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    • 2010
  • In recent time, rural-studying programs have emerged as an alternative to promoting exchange between urban and rural areas. The purpose of this research will be to take a look at such exchange activities through the study of cases involving rural areas using its human and material resources. The research will also consider the implications resulting from the possibility of its application in Korea. According to a Japan's rural-studying program, there was a whole family participation and there was cooperation between the school, village and the local government. There are some domestic places that applied this program, but only a few are successfully being implemented. To increase the possibility of successful application, building network systems between rural-studying schools will be vital. So will be the building of critical infrastructure to induce the return to farming and the establishment of assistance institutions. Also, visible assistance towards farms in rural area and conversion of recognition upon exchange activities between urban and rural will be necessary. Legislation of rural-studying program, establishment of local government assistance ordinance and continual education to local inhabitants will be central to the role of central and local government.

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Examination about Recycling of Korean Cabbage Wastes (배추 쓰레기의 자원화 방안)

  • Ju, H.S.;Chung, Kiomin;Whang, Key;Lee, S.T.
    • Journal of the Korea Organic Resources Recycling Association
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    • v.4 no.2
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    • pp.63-69
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    • 1996
  • Korean cabbage waste is produced in huge amounts in the process of dealing, and most of them are discarded imposing burden on our environment. In case of Garakdong agricultural and marine market in Seoul, the daily average amount of Korean cabbage waste is estimated more than 355ton(64.1% of the overall amount in waste occurrence). Recycling the cabbage waste is important for the protection of environment and reuse of waste materials. We examined the present situation of occurrence of the cabbage wastes, normal properties of the dietary fiber, and the conversion of high value-added dietary fiber from the cabbage wastes. As a result of examination of the content of dietary fiber in Korean cabbage waste, we found that the dietary fiber content(2.5%) was higher than the known value(0.7%), and that in the process of extraction of dietary fiber, there was no significant difference between the samples added with amylase and protease compared to control.

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Development of DSP-based Modbus Communication Scheme and Control Module for Controlling Actuators in Industrial Equipment (산업용 장비에서의 액추에이터를 제어 하기 위한 DSP에서의 Modbus통신 구현과 제어 모듈 개발)

  • Kim, Won-Jun;Gwak, Dong-Gi;Kim, Dong Hwan
    • Transactions of the Korean Society of Mechanical Engineers A
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    • v.41 no.11
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    • pp.1109-1117
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    • 2017
  • In this work, a new control module and communication system associated with DSP are proposed to overcome the limitations of the contemporary prevailing PLC-based industrial equipment controller, and the performance of the proposed system was experimentally verified. In the light of this issue, a communication conversion scheme from RS-485 to Modbus, the dominant communication protocol used by PLC, was developed and shown to yield enhanced compatibility between devices. The proposed system allows for ~50% cost reduction as well as downsizing of the industrial controllers. Furthermore, the design includes 24 V general digital I/O pins, which facilitate partial expansion of inputs and outputs. With Modbus communication implemented in DSP with the RS-485 interface, multi-to-multi communication may also be achieved.

Implementation of Dead Code Elimination in CTOC (CTOC에서 죽은 코드 제거 구현)

  • Kim, Ki-Tae;Kim, Je-Min;Yoo, Won-Hee
    • Journal of the Korea Society of Computer and Information
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    • v.12 no.2 s.46
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    • pp.1-8
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    • 2007
  • Although the Java bytecode has numerous advantages, there are also shortcomings such as slow execution speed and difficulty in analysis. Therefore, in order for the Java class file to be effectively executed under the execution environment such as the network, it is necessary to convert it into optimized code. We implements CTOC. In order to statically determine the value and type, CTOC uses the SSA Form which separates the variable according to assignment. Also, it uses a Tree Form for statements. But, due to insertion of the $\phi$-function in the process of conversion into the SSA Form, the number of nodes increased. This paper shows the dead code elimination to obtain a more optimized code in SSA Form. We add new live field in each node and achieve dead code elimination in tree structures. We can confirm after dead code elimination though test results that nodes decreases.

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