• 한국음향학회지
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• 제33권6호
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• pp.420-426
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• 2014

본 논문에서는 충격성 잡음 환경 하에서 인접 투사 알고리즘(Affine Projection Algorithm, APA)의 안정성을 높이기 위해 제안된 인접 투사 부호 알고리즘(Affine Projection Sign Algorithm, APSA)의 수렴 속도를 향상시키기 위한 새로운 APSA을 제안하였다. APSA은 충격성 잡음에 안정적으로 동작하고 역행렬 연산을 요구하지 않는다는 장점을 가지고 있다. 제안된 알고리즘은 기존 알고리즘의 장점을 가지면서도 기존의 알고리즘보다 더 빠른 수렴속도를 갖는다. 기존의 알고리즘은 i번째 과거 입력 신호를 필터 갱신을 위해 사용되는 모든 입력 신호의 $l_2$-norm으로 정규화 하지만 제안된 알고리즘은 i번째 과거 입력 신호를 i번째 과거 입력 신호의 $l_2$-norm 만으로 정규화한다. 시스템 식별 환경에서 두 알고리즘의 성능을 비교하는 컴퓨터 모의 실험을 수행하여 제안된 알고리즘의 수렴속도가 기존의 알고리즘보다 개선되었음을 보였다.

• 한국통신학회논문지
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• 제33권6B호
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• pp.450-455
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• 2008

본 논문에서는 기존의 EPC Class 1 RFID 시스템에서의 태그 인식 절차와 태그 충돌 방지 알고리즘을 분석하였으며, 태그 인식 속도를 향상시키기 위한 고속 충돌 방지 알고리즘을 제안한다. 고속 충돌 방지 알고리즘에서는 태그 인식 과정에서 태그의 충돌 정보를 이용하고, 기존의 알고리즘에서 존재하던 불필요한 절차를 생략하였다. 성능 평가를 위하여 기존의 알고리즘과 제안한 알고리즘을 수학적으로 분석하였고, 이를 시뮬레이션으로 검증하였다. 결과에 따르면, 고속 충돌 방지 알고리즘이 기존의 알고리즘에 비해 상당한 성능향상을 보임을 확인할 수 있었다.

• 전자공학회논문지B
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• 제29B권4호
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• pp.58-65
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• 1992

In this paper new back propagation algorithm which adds neurons to hidden layer is proposed. this proposed algorithm is applied to the pattern recognition of written number coupled with back propagation algorithm through omitting redundant learning. Learning rate and recognition rate of the proposed algorithm are compared with those of the conventional back propagation algorithm and the back propagation through omitting redundant learning. The learning rate of proposed algorithm is 4 times as fast as the conventional back propagation algorithm and 2 times as fast as the back propagation through omitting redundant learning. The recognition rate is 96.2% in case of the conventional back propagation algorithm, 96.5% in case of the back propagation through omitting redundant learning and 97.4% in the proposed algorithm.

• ETRI Journal
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• 제37권1호
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• pp.54-60
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• 2015

The use of serial concatenated codes is an effective technique for alleviating the error floor phenomenon of low-density parity-check (LDPC) codes. An enhanced sum-product algorithm (SPA) for LDPC codes, which is suitable for serial concatenated codes, is proposed in this paper. The proposed algorithm minimizes the number of errors by using the failed check nodes (FCNs) in LDPC decoding. Hence, the error-correcting capability of the serial concatenated code can be improved. The number of FCNs is simply obtained by the syndrome test, which is performed during the SPA. Hence, the decoding procedure of the proposed algorithm is similar to that of the conventional algorithm. The error performance of the proposed algorithm is analyzed and compared with that of the conventional algorithm. As a result, a gain of 1.4 dB can be obtained by the proposed algorithm at a bit error rate of $10^{-8}$. In addition, the error performance of the proposed algorithm with just 30 iterations is shown to be superior to that of the conventional algorithm with 100 iterations.

• Journal of Power Electronics
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• 제16권6호
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• pp.2212-2220
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• 2016

Based on the conventional PID algorithm and the adaptive PID (AD-PID) algorithm, a separate sampling adaptive PID (SSA-PID) algorithm is proposed to improve the transient response of digitally controlled DC-DC converters. The SSA-PID algorithm, which can be divided into an oversampled adaptive P (AD-P) control and an adaptive ID (AD-ID) control, adopts a higher sampling frequency for AD-P control and a conventional sampling frequency for AD-ID control. In addition, it can also adaptively adjust the PID parameters (i.e. $K_p$, $K_i$ and $K_d$) based on the system state. Simulation results show that the proposed algorithm has better line transient and load transient responses than the conventional PID and AD-PID algorithms. Compared with the conventional PID and AD-PID algorithms, the experimental results based on a FPGA indicate that the recovery time of the SSA-PID algorithm is reduced by 80% and 67% separately, and that overshoot is decreased by 33% and 12% for a 700mA load step. Moreover, the SSA-PID algorithm can achieve zero overshoot during startup.

• 전자공학회논문지B
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• 제30B권1호
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• pp.45-55
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• 1993

In this paper, a two-stage block matching algorithm (BMA), which can reduce greatly the computational complexity of the conventional BMAs, is proposed, in which the onedimensional distortion measure based on the integral projection is introduced to determine the candidate motion vectors and then among them a final motion vector is detected based on the conventional two-dimensional distortion measure. Due to the one-dimensional calculation of a distortion measure, the proposed algorithm can reduce the computational complexity of the conventional BMA (full search method with a 16$\times$16 block) by a factor of 4, with its performance comparable to those of the conventional ones. Simulation results based on the original and noisy image sequences are shown. Also the simulation of the proposed method combined with the MPEG (Moving Picture Experts Group) SM3 (Simulation Model Three) is presented. Computer simulation shows that the proposed algorithm is fast with its performance comparable to those of the conventional ones.

• 한국통신학회논문지
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• 제30권6C호
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• pp.450-456
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• 2005

In this paper, we propose a high-speed turbo decoding algorithm and present results of its implementation. The latency caused by (de)interleaving and iterative decoding in conventional MAP turbo decoder can be dramatically reduced with the proposed scheme. The main cause of the time reduction is to use radix-4, center to top, and parallel decoding algorithm. The reduced latency makes it possible to use turbo decoder as a FEC scheme in the real-time wireless communication services. However the proposed scheme costs slight degradation in BER performance because the effective interleaver size in radix-4 is reduced to an half of that in conventional method. To ensure the time reduction, we implemented the proposed scheme on a FPGA chip and compared with conventional one in terms of decoding speed. The decoding speed of the proposed scheme is faster than conventional one at least by 5 times for a single iteration of turbo decoding.

• 한국통신학회논문지
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• 제33권6C호
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• pp.438-443
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• 2008

The efficient method to implement the Max-Log-MAP algorithm is proposed by modifying the conventional algorithm. It is called a parallel soft output Viterbi algorithm (SOVA) and the rigorous proof is given for the equivalence between the Max-Log-MAP algorithm and the parallel SOVA. The parallel SOVA is compared with the conventional algorithms and we show that it is an efficient algorithm implementing the modified SOVA in parallel.

• 대한기계학회논문집
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• 제19권1호
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• pp.111-121
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• 1995

A fuzzy control algorithm of bell-type membership functions and 9 rules is constructed for narrow range level control of steam generators in nuclear power plants. It is implemented at a field digital distributed controller, a Westinghouse-made controller called Westinghouse Distributed Processing Family(WDPF). Performance for level control of the developed fuzzy controller is compared with that of conventional controller, both at the field controller. For these comparisons, both the fuzzy control algorithm and the conventional PI control algorithm were carefully tuned. Also the sampling time for optimal performance was investigated. The results show that the fuzzy control algorithm is not only better in performance than the conventional algorithm but also much easier to be tuned by operators in the field.

• 융합신호처리학회 학술대회논문집
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• 한국신호처리시스템학회 2001년도 하계 학술대회 논문집(KISPS SUMMER CONFERENCE 2001
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• pp.113-116
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• 2001

The conventional K-means algorithm is widely used in vector quantizer design and clustering analysis. Recently modified K-means algorithm has been proposed where the codevector updating step is as fallows: new codevector = current codevector + scale factor (new centroid - current codevector). This algorithm uses a fixed value for the scale factor. In this paper, we propose a new algorithm for the enhancement of learning time in fuzzy c-means a1gorithm. Experimental results show that the proposed method produces codebooks about 5 to 6 times faster than the conventional K-means algorithm with almost the same Performance.