• Journal of Welding and Joining
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• v.30 no.6
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• pp.113-119
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• 2012

Ultrasonic bonding is the novel packaging method for flip-chip with high yield and low-temperature bonding. The bonding module is a core part of the bonding machine, which can transfer the ultrasonic energy into the bonding spot. In this paper, we propose topology optimization technique which can make new design of boding modules due to the constraints on resonance frequency and mode shapes. The designed bonding module using topology optimization was fabricated in order to evaluate the bonding performance and reliable operation during the continuous bonding process. The actual production models based on the proposed design satisfied the target frequency range and ultrasonic power. The bonding test was performed using flip-chip with lead-free Sn-based bumps, the results confirmed that the bonding strength was sufficient with the designed bonding modules. Also the performance degradation of the bonding module was not observed after the 300-hour continuous process with bonding conditions.

• ETRI Journal
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• v.42 no.6
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• pp.943-950
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• 2020

We propose 8.2-GHz band radar RFICs for an 8 × 8 phased-array frequency-modulated continuous-wave receiver developed using 65-nm CMOS technology. This receiver panel is constructed using a multichip solution comprising fabricated 2 × 2 low-noise amplifier phase-shifter (LNA-PS) chips and a 4ch RX front-end chip. The LNA-PS chip has a novel phase-shifter circuit for low-voltage operation, novel active single-to-differential/differential-to-single circuits, and a current-mode combiner to utilize a small area. The LNA-PS chip shows a power gain range of 5 dB to 20 dB per channel with gain control and a single-channel NF of 6.4 dB at maximum gain. The measured result of the chip shows 6-bit phase states with a 0.35° RMS phase error. The input P1 dB of the chip is approximately -27.5 dBm at high gain and is enough to cover the highest input power from the TX-to-RX leakage in the radar system. The gain range of the 4ch RX front-end chip is 9 dB to 30 dB per channel. The LNA-PS chip consumes 82 mA, and the 4ch RX front-end chip consumes 97 mA from a 1.2 V supply voltage. The chip sizes of the 2 × 2 LNA-PS and the 4ch RX front end are 2.39 mm × 1.3 mm and 2.42 mm × 1.62 mm, respectively.

• Journal of the Korean Society for Precision Engineering
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• v.6 no.1
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• pp.45-51
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• 1989

In metal cutting various types of chips are produced in consequence of cutting conditions. According to the type of chips the cutting mechanism is to be changed. Most of the cutting theory is based on the continuous chip because of its convenient analysis, but the occurrence of the saw-toothed chip depends upon the workpiece and/or the cutting conditions, one of which is titanium alloy used widely. Nowadays titanium alloys are used widely with the rapid development of aerospace structural engineering application, whereas the theory of cutting mechanism has not been established yet, and the formatting process has not been understood satisfactorily, either. Unfortunately several misconceptions, conflicting statements and statements needing further clarifi- cation are also found. In this paper an attempt is made to clarify the formation process of saw-toothed chips which are to be produced during the orthogonal cutting process of titanium alloys. They were machined at low speed to avoid the rapid tool wear. We observed the SEM-photographs of chips taken at the quick-st- opping device. It is hoped that a rational model of the mechanics of cyclic chip formation can be developed. The results obtained are as follows. 1. When a saw- toothed chip is formed, the shear band begins at the primary shear zone and trans- fers to the free surface, so that a segment is produced and it is completed by upsetting between the formatting segment and the formatted segment. 2. As the rake angle or the clearance angle increases in the machining of the titanium alloy, the chip approaches to that of the continous type. 3. When the rake angle and the clearance angle are increased the shear energy and the unit friction energy decrease, which shows the same aspect as that of the continuous chip.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.21 no.4
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• pp.984-995
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• 1996

Data errors according to the various noises caused in the satellite communication links are corrected by the Viterbi decoding algorithm which has extreme error correcting capability. In this paper, we designed and implemented a convolutional encoder and Viterbi decoder ASIC which is used to encode the input data at the transmit side and correct the errors of the received data at the receive side for use in the VSAT communication system. And this chip may be used in any BPSK, QPSK, or OQPSK transmission system. The ambiguity resolver corrects PSK modem ambiguities by delaying, interting, and/or exchanging code symbol to restore their original sequence and polarity. In case of previous decoding system, ambiguity state(AS) of data is resolved by external control logic and extra redundancy data are needed to resolve AS. But, by adopting decoder proposed in this paper, As of data is resolved automatically by internal logic of decoder in case of continuous mode, and by external As line withoug extra redudancy data in burst mode case. So, decoding parts are simple in continuous mode and transmission efficiency is increased in bust mode. The features of this chip are full duplex operation with independent transmit and receive control and clocks, start/stop inputs for use in burst mode systems, loopback function to verify encoder and decoder, and internal or external control to resolve ambinguity state. For verification of the function and performance of a fabricated ASIC chip, we equiped this chip in the Central and Remote Earth Station of VSAT system, and did the performance test using the commerical INTELSAT VII under the real satellite link environmens. The results of test were demonstrated the superiority of performance.

• Journal of Korea Multimedia Society
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• v.19 no.2
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• pp.352-359
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• 2016

This paper presents high efficiency 5A synchronous DC-DC buck converter. The proposed DC-DC buck converter works from 4.5V to 18V input voltage range, and provides up to 5A of continuous output current and output voltage adjustable down to 0.8V. This chip is packaged MCP(multi-chip package) with control chip, top side P-CH switch, and bottom side N-CH switch. This chip is designed in a 25V high voltage CMOS 0.35um technology. It has a maximum power efficiency of up to 94% and internal 3msec soft start and fixed 500KHz PWM(Pulse Width Modulation) operations. It also includes cycle by cycle current limit function, short and thermal shutdown protection circuit at 150℃. This chip size is 2190um*1130um includes scribe lane 10um.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2000.04a
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• pp.240-245
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• 2000

This paper presents the experimental study of drilling for duralumin A2024 with intermittently decelerated feed rate. It is achieved through a programmed periodic increase and decrease in the feed rate using a machining center. The following experimental result were performed with the objective of solving chip to disposal problems. In conventional drilling of aluminum, long continuous chips are produced that wind around the drill causing difficulties in eliminating chips from the cutting zone. In order to acquire the basic data necessary to regulate the chip profile, the relationship between cutting variables and chip shape was investigated. The following conclusions are established from the experimental results. At a suitable feed fluctuation ratio, intermittently decelerated feed drilling proved successful in breaking chips to appropriate lengths while maintaining stable cutting. Thus, it is an effective method for improving chip disposal. The amplitude of the dynamic component of cutting force in intermittent feed frilling is influenced by the feed fluctuation ratio.

• Journal of the Korean Society of Manufacturing Technology Engineers
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• v.9 no.6
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• pp.103-110
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• 2000

Experimental study of drilling for duralumin A2024 was conducted with intermittently accelerated and decelerated feedrate. It is achieved through a programmed periodic increase and decrease in the feedrate using a machining center. The following experimental results were performed with the objective of solving chip to disposal problems. In conventional drilling of aluminum, long continuous chips are produced with winding around the drill and causing difficulties in eliminating chips from the cutting zone. In order to acquire the basic data necessary to regulate the chip profile, the relationship between cutting variables and chip shape was investigate. The following conclusions are established from the experimental results. At a suitable feed fluctuation ratio, intermittently decelerated feed drilling proved successful in braking chips to appropriate lengths while maintaining stable cutting. Thus, it is an effective method for improving chip disposal. The amplitude of the dynamic component of cutting force in intermittent feed drilling is influenced by the feed fluctuation ratio.

• Journal of the Korean Society for Precision Engineering
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• v.5 no.1
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• pp.84-93
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• 1988

The on-line detection of the chip flow is one of the most important technologies in com- pletly automatic operation of machine tool, such as FMS and Unmanned Factories. This problem has been studied by many researchers, however, it is not solved as yet. For the recognition of chip flow in this study, the dynamic cutting force components due to the chip breaking were measured by dynamometer of piezo-electric type, and the frequency components of cutting force were also analyzed. From the measured results, the effect of cutting conditions and tool geometry on the dynamic cutting force component and chip formation were investigated in addition to the relationships between frequency of chip breaking (fB) and side serrated crack (fC) of chip. As a result, the following conclusions were obtaianed. 1) The chip formations have a large effect on the dynamic cutting force components. When chip breaking takes place, the dynamic cutting force component greatly increases, and the peridoic components appear, which correspond to maximum peak- frequency. 2) The crater wear of tool has a good effect on the chip control causing the chiup to be formed as upward-curl shape. In this case, the dymamic cutting force component greatly increases also 3) fB and fC of chip are closely corelated, and fC of chips has a large effect on the change of the situation of chip flow and dynamic cutting force component. 4) Under wide cutting conditions, the limit value (1.0 kgf) of dynamic cutting force component exists between the broken and continuous chips. Accordingly, this value is suitable for recognition of chip flow in on-line control of the cutting process.

• The Journal of Asian Finance, Economics and Business
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• v.7 no.12
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• pp.783-793
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• 2020

This research investigates the explanatory factors governing the dividend payout to shareholders of blue-chip companies listed on Bursa Malaysia. In spite of continuous attention offered by empirical research on dividend payout of publicly-listed companies, paradoxically only few studies exclusively examined the explanatory factors from the perspective of blue-chip companies. Recognizing the capability of blue-chip companies to serve as a stalwart indicator of stock market condition as well as a consistent income source to shareholders, more research should be carried out for better inference on the companies' dividend payout decision. This research is using 522 observations from a sample of 18 Malaysian blue-chip companies over a 29-year period (1990 to 2019) and utilizes a panel data regression analysis for the estimation of the impact of eight factors, namely, systematic risk, leverage, free cash flow, lagged dividends, market-to-book value, profit growth, total asset turnover, and company size. Measuring dividend payout using two specifications (dividend/earnings and dividend/total assets), this research reveals that systematic risk and free cash flow have a significant and negative impact on dividend payout. Meanwhile, past year dividends, market-to-book value, profit growth, total asset turnover and company size have a significant and positive impact on dividend payout.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.284-287
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• 2001

In this paper, we designed and implemented a precise pulse motor control chip that generates the parabolic speed pattern. This chip can control step motor[1], DC servo[2] and AC servo motors at high speed and precisely. It can reduce the mechanical vibration to the minimum at the change point of a degree of acceleration. Because the parabolic speed pattern has the continuous acceleration change. In this paper, we present the pulse generation algorithm and the parabolic pattern speed generation. We verify these algorithm using visual C++. We designed this chip with VHDL(Very High Speed Integrated Circuit Hardware Description Language) and executed a logic simulation and synthesis using Synopsys synthesis tool. We executed the pre-layout simulation and post-layout simulation with Verilog-XL simulation tool. This chip was produced with 100 pins, PQFP package by 0.35 um CMOS process and implemented by completely digital logic. We developed the hardware test board and test program using visual C++. We verify the performance of this chip by driving the servo motor and the function by GUI(Graphic User Interface) environment.