• Journal of IKEEE
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• v.12 no.4
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• pp.211-216
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• 2008

This paper proposes an 8${\times}$8 bit parallel multiplier using MOS current-mode logic (MCML) circuit for low power consumption. The proposed circuit has a structure of low-power MOS current-mode logic circuit with sleep-transistor to reduce the leakage current. The sleep-transistor is used to PMOS transistor to minimize the leakage current. Comparing with the conventional MOS current-model logic circuit, the circuit achieves the reduction of the power consumption in sleep mode by 1/50. The designed multiplier is achieved to reduce the power consumption by 10.5% and the power-delay-product by 11.6% compared with the conventional MOS current-model logic circuit. This circuit is designed with Samsung 0.35 ${\mu}m$ standard CMOS process. The validity and effectiveness are verified through the HSPICE simulation.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.2
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• pp.104-110
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• 2011

A CMOS Image Sensor (CIS) mounted on mobile appliances requires low power consumption due to limitations of the battery life cycle. In order to reduce the power consumption of CIS, we propose novel power reduction techniques such as a data flip-flop circuit with leakage current elimination and a low power single slope analog-to-digital (A/D) converter with a sleep-mode comparator. Based on 0.13 ${\mu}m$ CMOS process, the chip satisfies QVGA resolution (320 ${\times}$ 240 pixels) that the cell pitch is 2.25 um and the structure is a 4-Tr active pixel sensor. From the experimental results, the performance of the CIS has a 10-b resolution, the operating speed of the CIS is 16 frame/s, and the power dissipation is 25 mW at a 3.3 V(analog)/1.8 V(digital) power supply. When we compare the proposed CIS with conventional ones, the power consumption was reduced by approximately 22% in the sleep mode, and 20% in the active mode.

• KIEAE Journal
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• v.4 no.3
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• pp.203-210
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• 2004

This dissertation identifies and investigates the possible control modes of hybrid ventilation system in applying to general apartments. It evaluates range of hybrid ventilation control modes in terms of indoor air quality, thermal comfort, and energy consumption in a living room and a kitchen of the $1000m^2$ apartment. The TRNSYS simulation program was used for evaluating the following four ventilation types : A ventilation mode relying on only infiltration for supplying air, A natural ventilation mode considering with weather condition, A hybrid ventilation (natural + mechanical ventilation) mode allowing minimum ventilation with no heat exchange, and a hybrid ventilation mode with heat exchange. This study shows the following results. As temperature being controlled by heating cooling equipments, there is without significant difference in thermal performance among ventilation types. Regarding Indoor Air quality, Indoor air contamination level of the hybrid ventilation case consistently keep the lower levels. The hybrid ventilation modes consume more energy by a 49% as compared to the A ventilation mode relying on only infiltration for supplying air. It is caused by the continuous ventilation for keeping good indoor air quality; the increase of energy consumption can be attributable to the increase of the heating energy. Therefore, the heat exchange between indoor and outdoor air is required during heating season in severe weather conditions. During the cooling seasons, Introducing natural ventilation can achieve energy saving by 40 ~ 45%. Thus, it can be an effective strategies for energy saving. Based on these results, a hybrid ventilation system can be suggested as an effective ventilation strategy for archiving high level of indoor air quality, thermal comfort, and energy consumption.

• Journal of IKEEE
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• v.14 no.2
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• pp.1-8
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• 2010

In this paper, Green Mode Power IC is designed to reduce the standby power. The proposed and designed IC works for the Switch Mode Power Supply(SMPS) and has the function of PWM. To reduce the unnecessary electric power, burst mode and skip mode section are introduced and controlled by external power MOSFET to diminish the standby power. The proposed IC is designed and simulated by KEC 30V-High Voltage 0.5um CMOS Process. The structure of proposed IC is composed of voltage regulator circuit, voltage reference circuit, UVLO(Under Voltage Lock out) circuit, Ibias circuit, green circuit, PWM circuit, OSC circuit, protection circuit, control circuit, and level & driver circuit. Measuring the current consumption of each block from the simulation results, 1.2942 mA of the summing consumption current from each block is calculated and ot proved that it is within the our design target of 1.3 mA. The current consumption of the proposed IC in this paper is less than a half of conventional ICs, and power consumption is reduced to the extent of 1W in standby mode. From the above results, we know that efficiency of proposed IC is superior to the previous IC.

• Journal of IKEEE
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• v.26 no.3
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• pp.483-487
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• 2022

In this paper, we design a self-powered Arduino system for solar energy harvesting and explain its operation. To perform the operation, the Arduino system senses the amount of solar energy that changes every moment and adjusts the ratio of the active mode and sleep mode operation time according to a given solar light intensity. If the intensity of sunlight is strong enough, the Arduino system can be continuously driven in active mode and receive sufficient power from sunlight. If not, the system can run in sleep mode to minimize power consumption. As a result, it can be seen that energy consumption can be minimized by reducing power consumption by up to 81.7% when using sleep mode compared to continuously driving active mode. Also, when the light intensity is at an intermediate level, the ratio between the active mode and the sleep mode is appropriately adjusted according to the light intensity to operate. The method of self-control of the operating time ratio of active mode and sleep mode, proposed in this paper, is thought to be helpful in energy-efficient operation of the self-powered systems for wearables and bio-health applications.

• Journal of the Korean Operations Research and Management Science Society
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• v.32 no.4
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• pp.89-99
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• 2007

In this paper, an analytic model of a sleep mode operation in the IEEE 802.16e is investigated. A mobile subscriber station(MSS) goes to sleep mode after negotiations with the base station(BS) and wakes up periodically for a short interval to check whether there is downlink traffic to it. If the arrival of traffic is notified, an MSS returns to wake mode. Otherwise, it again enters increased sleep interval which is double as the previous one. In order to consider the situation more practically, we propose the sleep mode starting threshold, during which MSS should await packets before it enters the sleep mode. By modifying the M/G/l with multiple vacations model, energy consumption ratio(ECR) and average packet response time are calculated. Our analytic model provides potential guidance in determining the optimal parameters values such as sleep mode starting threshold, minimal sleep and maximal sleep window.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.8A
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• pp.790-797
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• 2006

IEEE 802.16e specifies two different power saving modes(PSM). One is sleep mode and the other is idle mode. These modes are different in that whether a mobile node maintains its state information with the serving base station or not. This difference results in different efficiency in consuming battery power of a mobile terminal. Therefore, it becomes important to analyze the performance of each power saving mode considering the parameters affecting the power consumption. In this paper, we propose a performance modeling framework of sleep mode and idle mode in terms of power saving efficiency. The analytical results are verified by computer simulations that idle mode is superior to sleep mode in power consumption of mobile node.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.3A
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• pp.221-229
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• 2007

In this paper, we propose and analyze the optimized sleep mode for a mobile node (MN) in IEEE 802.16e wireless metropolitan area networks. Because a MN in a sleep mode specified in 802.16e specification should maintain state information with the base station currently attached, it must renew sleep state with a new base station after handover which leads to unnecessary waste of battery power. Noting that the mobility pattern of a MN is independent of call arrival patterns, we propose an optimized sleep mode to eliminate unnecessary standby period of a MN in sleep state after handover. We also propose an analytical model for the proposed scheme in terms of power consumption and the initial call response time. Simulation studies that compare the performance between the sleep mode and the optimized sleep mode show that our scheme marginally increases initial call response delay with the huge reduction in power consumption.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.7
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• pp.659-664
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• 2016

In this paper, we suggest operational trans-conductance amplifier(OTA) for current-mode FIR filter that can be used in a digital circuit system requiring high operating frequency and low power consumption. The current-mode signal processing is one of the very innovative design method for a low power consumption system with high operating frequency because it shows a constant power regardless of frequency. From the simulation result using 0.35um CMOS process, when Vdd is 2V, it is confirmed that the proposed circuit showed the dynamic range of the about 1V, about 50% of supply voltage and output current swing of about 0~200uA. Also, the power consumption was evaluated with about 21uW and the active size for an integration was measured with $71um{\times}166um$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.4
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• pp.289-295
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• 2008

In this paper, we designed the off-line PWM(Pulse width modulation) control IC for flyback type power converter to reduce the standby power consumption. In normal state, this off-line PWM IC generates the output pulse with $40\sim60kHz$ frequency and duty ratio of $20\sim88%$. When SMPS operates in standby mode, this IC generates the output pulse with 33kHz frequency and duty ratio of 1 %. SPICE simulation was performed to verify the standby power consumption of the power converter with designed of-line PWM IC. Power converter with designed off-line PWM IC consumes less than 0.3W when it operates in standby mode condition.