• Title/Summary/Keyword: Conductive Annealing

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Rheological behavior and IPL sintering properties of conductive nano copper ink using ink-jet printing (전도성 나노 구리잉크의 잉크젯 프린팅 유변학적 거동 및 광소결 특성 평가)

  • Lee, Jae-Young;Lee, Do Kyeong;Nahm, Sahn;Choi, Jung-Hoon;Hwang, Kwang-Taek;Kim, Jin-Ho
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.30 no.5
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    • pp.174-182
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    • 2020
  • The printed electronics field using ink-jet printing technology is in the spotlight as a next-generation technology, especially ink-jet 3D printing, which can simultaneously discharge and precisely control various ink materials, has been actively researched in recent years. In this study, complex structure of an insulating layer and a conductive layer was fabricated with photo-curable silica ink and PVP-added Cu nano ink using ink-jet 3D printing technology. A precise photocured silica insulating layer was designed by optimizing the printing conditions and the rheological properties of the ink, and the resistance of the insulating layer was 2.43 × 1013 Ω·cm. On the photo-cured silica insulating layer, a Cu conductive layer was printed by controlling droplet distance. The sintering of the PVP-added nano Cu ink was performed using an IPL flash sintering process, and electrical and mechanical properties were confirmed according to the annealing temperature and applied voltage. Finally, it was confirmed that the resistance of the PVP-added Cu conductive layer was very low as 29 μΩ·cm under 100℃ annealing temperature and 700 V of IPL applied voltage, and the adhesion to the photo-cured silica insulating layer was very good.

Electrical properties of AZO transparent conductive oxide with substrate bias and $H_2$ annealing (DC 마그네트론 스퍼트링법으로 제조한 ZnO:N,Al 박막의 전기적 특성에 관한연구)

  • Liu, Yan-Yan;So, Byung-Moon;Park, Choon-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.303-304
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    • 2008
  • Al, N-codoped ZnO(ZnO:N,Al) thin films were deposited on n-type Si(100) substrate at $450^{\circ}C$ with various conditions of ambient gas$(N_2:O_2)$ by DC magnetron sputtering method using ZnO:$Al_2O_3$(2wt%) as a target, and then were annealed at 500, 700, $800^{\circ}C$ in $N_2$ gas for one hour. XRD patterns showed that all of the ZnO:N,Al thin films annealed at $80^{\circ}C$ grew with two peaks, which means poor crystallinity of the thin films deposited. Hall effects in Van der Pauw configuration proved that after annealing the films deposited showed low resistivity and high carrier concentration. While the films annealed at $800^{\circ}C$ showed low resistivity of $\sim10^{-2}\Omega$ cm and high carrier concentration of $\sim10^{19}cm^{-3}$.

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The property of surface morphology of AZO films deposited at low temperature with post-annealing (저온증착 AZO 박막의 분위기 후열처리에 따른 표면 형상 특성)

  • Jeong, Yun-Hwan;Chen, Ho;Song, Min-Jong;Park, Choon-Bae
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.06a
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    • pp.417-418
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    • 2008
  • Transparent conductive oxide (TCO) are necessary as front electrode or anti-reflecting coating for increasing efficiency of LED and Photodiode. In this paper, aluminum-doped Zinc oxide films(AZO) were prepared by DC magnetron sputtering on glass(corning 1737) and Si substrate at temperature of $100^{\circ}C$ and then annealed at temperature of $400^{\circ}C$ for 1hr in Ar and vaccum. The AZO films were etched in diluted HCL (0.5 %) to examine the surface morphology properties. After annealing, Structural and electrical property were investigated. The c-axis orientation along (002) plane was enhanced and the electrical resistivity of the AZO film decreased from $1.1\times10^{-1}$ to $1.6\times10^{-2}{\Omega}cm$. We observed textured structure of AZO thin film etched for 2s.

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FLIP CHIP ON ORGANIC BOARD TECHNOLOGY USING MODIFIED ANISOTROPIC CONDUCTIVE FILMS AND ELECTROLESS NICKEL/GOLD BUMP

  • Yim, Myung-Jin;Jeon, Young-Doo;Paik, Kyung-Wook
    • Journal of the Microelectronics and Packaging Society
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    • v.6 no.2
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    • pp.13-21
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    • 1999
  • Flip chip assembly directly on organic boards offers miniaturization of package size as well as reduction in interconnection distances resulting in a high performance and cost-competitive Packaging method. This paper describes the investigation of alternative low cost flip-chip mounting processes using electroless Ni/Au bump and anisotropic conductive adhesives/films as an interconnection material on organic boards such as FR-4. As bumps for flip chip, electroless Ni/Au plating was performed and characterized in mechanical and metallurgical point of view. Effect of annealing on Ni bump characteristics informed that the formation of crystalline nickel with $Ni_3$P precipitation above $300^{\circ}C$ causes an increase of hardness and an increase of the intrinsic stress resulting in a reliability limitation. As an interconnection material, modified ACFs composed of nickel conductive fillers for electrical conductor and non-conductive inorganic fillers for modification of film properties such as coefficient of thermal expansion(CTE) and tensile strength were formulated for improved electrical and mechanical properties of ACF interconnection. The thermal fatigue life of ACA/F flip chip on organic board limited by the thermal expansion mismatch between the chip and the board could be increased by a modified ACA/F. Three ACF materials with different CTE values were prepared and bonded between Si chip and FR-4 board for the thermal strain measurement using moire interferometry. The thermal strain of ACF interconnection layer induced by temperature excursion of $80^{\circ}C$ was decreased with decreasing CTEs of ACF materials.

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Effect of High Temperature Annealing on the Characteristics of SiC Schottky Diodes (고온 열처리 공정이 탄화규소 쇼트키 다이오드 특성에 미치는 영향)

  • Cheong, Hui-Jong;Bahng, Wook;Kang, In-Ho;Kim, Sang-Cheol;Han, Hyun-Sook;Kim, Hyeong-Woo;Kim, Nam-Kyun;Lee, Yong-Jae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.9
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    • pp.818-824
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    • 2006
  • The effects of high-temperature process required to fabricate the SiC devices on the surface morphology and the electrical characteristics were investigated for 4H-SiC Schottky diodes. The 4H-SiC diodes without a graphite cap layer as a protection layer showed catastrophic increase in an excess current at a forward bias and a leakage current at a reverse bias after high-temperature annealing process. Moreover it seemed to deviate from the conventional Schottky characteristics and to operate as an ohmic contact at the low bias regime. However, the 4H-SiC diodes with the graphite cap still exhibited their good electrical characteristics in spite of a slight increase in the leakage current. Therefore, we found that the graphite cap layer serves well as the protection layer of silicon carbide surface during high-temperature annealing. Based on a closer analysis on electric characteristics, a conductive surface transfiguration layer was suspected to form on the surface of diodes without the graphite cap layer during high-temperature annealing. After removing the surface transfiguration layer using ICP-RIE, Schottky diode without the graphite cap layer and having poor electrical characteristics showed a dramatic improvement in its characteristics including the ideality factor[${\eta}$] of 1.23, the schottky barrier height[${\Phi}$] of 1.39 eV, and the leakage current of $7.75\{times}10^{-8}\;A/cm^{2}$ at the reverse bias of -10 V.

Effects of Growth Ambient, Process Pressure, and Heat Treatments on the Properties of RF Magnetron Sputtered GaMgZnO UV-Range Transparent Conductive Films

  • Patil, Vijay;Lee, Chesin;Lee, Byung-Teak
    • Korean Journal of Materials Research
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    • v.31 no.6
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    • pp.320-324
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    • 2021
  • Effects of growth variables and post-growth annealing on the optical, structural and electrical properties of magnetron-sputtered Ga0.04Mg0.10Zn0.86O films are characterized in detail. It is observed that films grown from pure oxygen plasma showed high resistivity, ~102 Ω·cm, whereas films grown in Ar plasma showed much lower resistivity, 2.0 × 10-2 ~ 1.0 × 10-1 Ω·cm. Post-growth annealing significantly improved the electrical resistivity, to 4.3 ~ 9.0 × 10-3 Ω·cm for the vacuum annealed samples and to 1.3 ~ 3.0 × 10-3 Ω·cm for the films annealed in Zn vapor. It is proposed that these phenomena may be attributed to the improved crystalline quality and to changes in the defect chemistry. It is suggested that growth within oxygen environments leads to suppression of oxygen vacancy (Vo) donors and formation of Zn vacancy (VZn) acceptors, resulting in highly resistive films. After annealing treatment, the activation of Ga donors is enhanced, Vo donors are annihilated, and crystalline quality is improved, increasing the electron mobility and the concentration. After annealing in Zn vapor, Zn interstitial donors are introduced, further increasing the electron concentration.

Transparent Electrode Characteristics of SnO2/AgNi/SnO2 Multilayer Structures (SnO2/AgNi/SnO2 다중층 구조의 투명 전극 특성)

  • Min-Ho Hwang;Hyun-Yong Lee
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.5
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    • pp.500-506
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    • 2024
  • The transparent electrode characteristics of the SnO2/AgNi/SnO2 (OMO) multilayer structures prepared by sputtering were investigated according to the annealing temperature. Ni-doped Ag of various compositions was selected as the metal layer and heat treatment was performed at 100~300℃ to evaluate the thermal stability of the metals. The manufactured OMO multilayer structures were heat treated for 6 hours at 400~600℃ in an N2 atmosphere. The structural, electrical, and optical properties of the OMO structures before and after annealing were evaluated and analyzed using a UV-VIS spectrophotometer, 4-point probe, XPS, FE-SEM, etc. OMO with Ni-doped Ag shows improved performance due to the reduction of structural defects of Ag during annealing, but OMO structure with pure Ag shows degradation characteristics due to Ag diffusion into the oxide layer during high-temperature annealing. The figure of merit (FOM) of SnO2/Ag/SnO2 was highest at room temperature and gradually decreased as the heat treatment temperature increased. On the other hand, the FOM value of SnO2/AgNi/SnO2 mostly showed its maximum value at high temperature(~550℃). In particular, the FOM value of SnO2/Ag-Ni (3.2 at%)/SnO2 was estimated to be approximately 2.38×10-2-1. Compared to transparent electrodes made of other similar materials, the FOM value of the SnO2/Ag-Ni (3.2 at%)/SnO2 multilayer structure is competitive and is expected to be used as an alternative transparent conductive electrode in various devices.

Study on the Thermal Stability of PEDOT/PSS Film Hybrided with Graphene Oxide (그래핀 옥사이드와 복합화한 PEDOT/PSS 필름의 열적 안정성에 관한 연구)

  • Choi, Jong Hyuk;Park, Wan-Su;Lee, Seong Min;Chung, Dae-won
    • Applied Chemistry for Engineering
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    • v.27 no.4
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    • pp.402-406
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    • 2016
  • In order to investigate the thermal stability of electro-conductive poly(3,4-ethylenedioxythiophene)-poly(styrene sulfonate) (PEDOT/PSS), we have prepared films by casting PEDOT/PSS aqueous solution without using a binding material and measured surface resistances of the films while annealing at $200^{\circ}C$. Electrical properties of films were improved by annealing, and the maximum conductivity ($540S{\cdot}m^{-1}$) after annealing for 2 hrs was found to be approximately 3 times higher than that ($180S{\cdot}m^{-1}$) of the original film. The conductivities, however, dramatically decreased with an increase in annealing time and dissipated after 24 hrs of annealing. On the other hand, PEDOT/PSS films hybridized with graphene oxide (GO) displayed a salient improvement in conductivity by annealing, which was measured to be around $600S{\cdot}m^{-1}$ even after 30 hrs of annealing at $200^{\circ}C$. We tentatively conclude that hybridization with GO enhances the thermal stability of PEDOT/PSS.

Effect of Surface States of the Substrate on the Temperature Rampup Rate During Rapid Thermal Annealing by Halogen Lamps (할로겐 램프에 의한 급속 열처리에서 기판 표면 상태에 따른 온도 상승 효과에 관한 연구)

  • 민경익;이석운;주승기
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.28A no.10
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    • pp.840-846
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    • 1991
  • In case of the rapid thermal process by halogen lamps, an optical pyrometer is generally used to measure the temperature. It is, however, necessary to measure the temperature by the thermocouple when the process temperature is lower than 700$^{\circ}C$ and the correction of the temperature is required. Contact by the PdAg paste is commonly used out but in this case it is impossible to see the effect of surface states of the substrate, which is critical in the rapid thermal process. In this study, real temperature ramping speed of silicon substrates coveredwith various thin films such as SiO$_2$2, Si$_{3}N_{4}$, dopants, and conductive layers (Ti or Co) was investigated by a mechanical contact of the thermocouple. And the results were compared with the case in which the contact was made by the PdAg paste. Effect of process ambient was also studied. It was found that depending on the surface state, overshoot more than 100$^{\circ}C$ could occur. It was also found that in case of the substrate covered with conductive layers, mechanical contact might render the correct temperature.

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Synthesis of TCO-free Dye-sensitized Solar Cells with Nanoporous Ti Electrodes Using RF Magnetron Sputtering Technology

  • Kim, Doo-Hwan;Heo, Jong-Hyun;Kwak, Dong-Joo;Sung, Youl-Moon
    • Journal of Electrical Engineering and Technology
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    • v.5 no.1
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    • pp.146-150
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    • 2010
  • A new type of dye-sensitized solar cell (DSC) based on a porous type Ti electrode without using a transparent conductive oxide (TCO) layer is fabricated for low-cost high-efficient solar cell application. The TCO-free DSC is composed of a glass substrate/dye-sensitized $TiO_2$ nanoparticle/porous Ti layer/electrolyte/Pt sputtered counter electrode. The porous Ti electrode (~350 nm thickness) with high conductivity can collect electrons from the $TiO_2$ layer and allows the ionic diffusion of $I^-/I_3{^-}$ through the hole. The vacuum annealing treatment is important with respect to the interfacial necking between the metal Ti and porous $TiO_2$ layer. The efficiency of the prepared TCO-free DSC sample is about 3.5% (ff: 0.48, $V_{oc}$: 0.64V, $J_{sc}$: 11.14 mA/$cm^2$).