• IEIE Transactions on Smart Processing and Computing
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• v.4 no.6
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• pp.450-454
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• 2015

Short execution time is the major performance factor for computer systems. This performance factor is directly determined by code quality, which is influenced by the compiler's optimizations. However, a compiler has limitations when optimizing source code due to insufficient information. Thus, if programmers can learn the reasons why a compiler fails to apply optimizations, they can rewrite code that is more easily understood by the compiler, and thus improve performance. In this paper, we propose a compiler that provides a programmer with reasons for failed optimization and recognizes programmer's additional information to obtain better optimization. As a result, we obtain performance improvement, i.e., reducing execution time and code size, by taking advantage of additional optimization opportunities.

• International Journal of Aeronautical and Space Sciences
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• v.14 no.2
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• pp.112-121
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• 2013

An approach for composing a performance optimized computational code is suggested for the latest microprocessors. The concept of the code optimization, termed localization, is maximizing the utilization of the second level cache that is common to all the latest computer systems, and minimizing the access to system main memory. In this study, the localized optimization of the LU-SGS (Lower-Upper Symmetric Gauss-Seidel) code for the solution of fluid dynamic equations was carried out in three different levels and tested for several different microprocessor architectures widely used these days. The test results of localized optimization showed a remarkable performance gain of more than two times faster solution than the baseline algorithm for producing exactly the same solution on the same computer system.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.2
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• pp.124-133
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• 2022

With the development of hardware technology and the advancement of numerical model methods, more precise weather forecasts can be carried out. In this paper, we propose a Unicon Optimization scheme combining Loop Vectorization, Dependency Vectorization, and Code Modernization to optimize and increase Maintainability the Unicon source contained in SCAM, a simplified version of CESM, and present an overall SCAM structure. This paper tested the unicorn optimization scheme in the SCAM structure, and compared to the existing source code, the loop vectorization resulted in a performance improvement of 3.086% and the dependency vectorization of 0.4572%. And in the case of Unicorn Optimization, which applied all of these, the performance improvement was 3.457% compared to the existing source code. This proves that the Unicorn Optimization technique proposed in this paper provides excellent performance.

• Journal of the Korea Computer Industry Society
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• v.5 no.9
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• pp.1079-1088
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• 2004

Generally, the code motion algorithm accomplishes the run-time optimal connected with the computational optimifation and the register overhead This paper proposes a sparse code motion, which considers the code size, in addition to computational optimization and lifetime optimization. The BCM algorithm carries out the optimal code motion computationally and the LCM algorithm reduces the register overhead in a sparse code motion algorithm. A sparse code motion algorithm is optimum algorithm computationally and lifetime because of suppression unnecessary code motion This algorithm improves runtime and efficiency of the program than the previous work through the performance test.

• Proceedings of the Korea Information Processing Society Conference
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• 2012.11a
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• pp.42-45
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• 2012

A network processor (NP) is an application-specific instruction-set processor for fast and efficient packet processing. There are many issues in compiler's code generation and optimization due to NP's hardware constraints and special hardware support. In this paper, we describe in detail how to resolve the issues. Our compiler was developed on LLVM 3.0 and the NP target was our in-house network processor which consists of 32 64-bit RISC processors and supports multi-context with special hardware structures. Our compiler incurs only 9.36% code size overhead over hand-written code while satisfying QoS, and the generated code was tested on a real packet processing hardware, called S20 for code verification and performance evaluation.

• Proceedings of the Computational Structural Engineering Institute Conference
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• 1995.04a
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• pp.187-194
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• 1995

Traditional genetic algorithms(GA) have mostly used binary code for representing design variable. The binary code GA has many difficulties to solve optimization problems with continuous design variables because of its targe computer core memory size, inefficiency of its computing time, and its bad performance on local search. In this paper, a real code GA is proposed for dealing with the above problems. So, new crossover and mutation processes of read code GA are developed to use continuous design variables directly. The results of real code GA are compared with those of binary code GA for several single and multiple objective optimization problems. As results of comparisons, it is found that the performance of the real code GA is better than that of the binary code GA, and concluded that the rent code GA developed here can be used for the general optimization problem.

• The KIPS Transactions:PartA
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• v.8A no.1
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• pp.27-35
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• 2001

This paper presents the assignment motion algorithm unrestricted for code optimization computationally. So, this algorithm is suppressed the unnecessary code motion in order to avoid the superfluous register pressure, we propose the assignment motion algorithm added to the final optimization phase. This paper improves an ambiguous meaning of the predicated. For mixing the basic block level analysis with the instruction level analysis, an ambiguity occurred in knoop’s algorithm. Also, we eliminate an ambiguity of it. Our proposal algorithm improves the runtime efficiency of a program by avoiding the unnecessary recomputations and reexecutions of expressions and assignment statements.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.30 no.7
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• pp.68-80
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• 2002

An approach for composing a performance optimized computational code is suggested for latest microprocessors. The concept of the code optimization, called here as localization, is maximizing the utilization of the second level cache that is common to all the latest computer system, and minimizing the access to system main memory. In this study, the localized optimization of LU-SGS (Lower-Upper Symmetric Gauss-Seidel) code for the solution of fluid dynamic equations was carried out in three different levels and tested for several different microprocessor architectures most widely used in these days. The test results of localized optimization showed a remarkable performance gain up to 7.35 times faster solution, depending on the system, than the baseline algorithm for producing exactly the same solution on the same computer system.

• Computational Structural Engineering
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• v.8 no.2
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• pp.123-132
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• 1995

Genetic Algorithms(GA), which are based on the theory of natural evolution, have been evaluated highly for their robust performances. Traditional GA has mostly used binary code for representing design variable. The binary code GA has many difficulties to solve optimization problems with continuous design variables because of its large computer core memory size, inefficiency of its computing time, and its bad performance on local search. In this paper, a real code GA is proposed for dealing with the above problems. So, new crossover and mutation processes of GA are developed to use continuous design variables directly. The results of read code GA are compared with those of binary code GA for several single and multiple objective optimization problems. As a result of comparisons, it is found that the performance of the real code GA is better than that of the binary code GA, and concluded that the real code GA developed here can be used for the general optimization problem.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.2
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• pp.96-102
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• 2014

The embedded processor market has grown rapidly and consistently with the appearance of mobile devices. In an embedded system, the power consumption and execution time are important factors affecting the performance. The system performance is determined by both hardware and software. Although the hardware architecture is high-end, the software runs slowly due to the low quality of codes. This study compared the performance of two major compilers, LLVM and GCC on a32-bit EISC embedded processor. The dynamic instructions and static code sizes were evaluated from these compilers with the EEMBC benchmarks.LLVM generally performed better in the ALU intensive benchmarks, whereas GCC produced a better register allocation and jump optimization. The dynamic instruction count and static code of GCCwere on average 8% and 7% lower than those of LLVM, respectively.