• Journal of Korea Multimedia Society
• /
• v.5 no.2
• /
• pp.167-175
• /
• 2002

Image Mosaicing creates a new image by composing video frames or still images that are related, and performed by arrangement, composition and redundancy analysis of images. This paper proposes a hierarchical image mosaicing system using camera and object parameters far efficient video database construction. A tree-based image mosiacing has implemented for high-speed computation time and for construction of static and dynamic image mosaic. Camera parameters are measured by using least sum of squared difference and affine model. Dynamic object detection algorithm has proposed for extracting dynamic objects. For object extraction, difference image, macro block, region splitting and 4-split detection methods are proposed and used. Also, a dynamic positioning method is used for presenting dynamic objects and a blurring method is used for creating flexible mosaic image.

• The KIPS Transactions:PartC
• /
• v.11C no.3
• /
• pp.353-360
• /
• 2004

In this Paper, We propose an efficient iteration decoding control method with variable iteration decoding of iteration codes decoding using Cyclic Redundancy Check. As the number of iterations increases, the bit error rate and frame error rate of the decoder decrease and the incremental improvement gradually diminishes. However, when the iteration decoding number is increased, it require much delay and amount of processing time for decoding. Also, It can be observed the error nor that the performance cannot be improved even though increasing of the number of iterations and SNR. So, Suitable number of iterations for stopping criterion is required. we propose variable iteration control method to adapt variation of channel using Frame Error-Check indicator. Therefore, the amount of computation and the number of iterations required for iteration decoding with CRC method can be reduced without sacrificing performance.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.13 no.5
• /
• pp.390-399
• /
• 1988

A conventional BTC has the merit of real time processing and simple computation, but has the problem that its compression rate is low. In this paper, a modified BTC using the Quad Tree which is frequently used in binary image is proposed. The method results in the low compression rate by decreasing the total number of subblocks by mean of making the size of a subblock large in the small variation area of graty level and the size af a subblock small in the large variation area of gary level. For the effective transmission of bit plane, the Huffman run-lengh code for the large size of a subblock and the lookup table for tha small size of a subblock are used. The proposed BTC method show the result of coding 256 level image at the average data rate of about 0.8 bit/pixel.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.27 no.1C
• /
• pp.112-121
• /
• 2002

In this paper, we present a design of a hash processor for data security systems. Two standard hash algorithms, Sha-1(American) and HAS-1600(Korean), are implemented on a single hash engine to support real time processing of the algorithms. The hash processor can also be used as a PRNG(Pseudo-random number generator) by utilizing SHA-1 hash iterations, which is being used in the Intel software library. Because both SHA-1 and HAS-160 have the same step operation, we could reduce hardware complexity by sharing the computation unit. Due to precomputation of message variables and two-stage pipelined structure, the critical path of the processor was shortened and overall performance was increased. We estimate performance of the hash processor about 624 Mbps for SHA-1 and HAS-160, and 195 Mbps for pseudo-random number generation, both at 100 MHz clock, based on Samsung 0.5um CMOS standard cell library. To our knowledge, this gives the best performance for processing the hash algorithms.

• Journal of IKEEE
• /
• v.24 no.3
• /
• pp.777-782
• /
• 2020

In this paper, we propose CNN-based HMI system using Doppler radar and voice sensor, and present hardware design and implementation results. To overcome the limitation of single sensor monitoring, the proposed HMI system combines data from two sensors to improve performance. The proposed system exhibits improved performance by 3.5% and 12% compared to a single radar and voice sensor-based classifier in noisy environment. In addition, hardware to accelerate the complex computational unit of CNN is implemented and verified on the FPGA test system. As a result of performance evaluation, the proposed HMI acceleration platform can be processed with 95% reduction in computation time compared to a single software-based design.

• Journal of KIISE:Software and Applications
• /
• v.32 no.10
• /
• pp.949-955
• /
• 2005

In this Paper, we propose fast block matching algorithm by dividing complex areas based on complexity order of reference block and square sub-block to reduce an amount of computation of full starch(FS) algorithm for fast motion estimation, while keeping the same prediction quality compared with the full search algorithm. By using the fact that matching error is proportional to the gradient of reference block, we reduced unnecessary computations with square sub-block adaptive matching scan based image complexity instead of conventional sequential matching scan and row/column based matching scan. Our algorithm reduces about $30\%$ of computations for block matching error compared with the conventional partial distortion elimination(PDE) algorithm without any prediction quality, and our algorithm will be useful in real-time video coding applications using MPEG-4 AVC or MPEG-2.

• Journal of KIISE:Software and Applications
• /
• v.32 no.10
• /
• pp.963-973
• /
• 2005

Increasing attention is being recently devoted to various problems inherent in the topological design of networks systems. The topological structure of these networks can be based on service centers, terminals (users), and connection cable. Lately, these network systems are well designed with tiber optic cable, because the requirements from users become increased. But considering the high cost of the fiber optic cable, it is more desirable that the network architecture is composed of a spanning tree. In this paper, we present a GA (Genetic Algorithm) for solving bicriteria network topology design problems of wide-band communication networks connected with fiber optic cable, considering the connection cost, average message delay, and the network reliability We also employ the $Pr\ddot{u}fer$ number (PN) and cluster string in order to represent chromosomes. Finally, we get some experiments in order to certify that the proposed GA is the more effective and efficient method in terms of the computation time as well as the Pareto optimality.

• Journal of KIISE
• /
• v.42 no.11
• /
• pp.1303-1313
• /
• 2015

MapReduce provides high levels of system scalability and fault tolerance for large-size data processing. A MapReduce-based k-nearest-neighbor(k-NN) join algorithm seeks to produce the k nearest-neighbors of each point of a dataset from another dataset. The algorithm has been considered important in bigdata analysis. However, the existing k-NN join query-processing algorithm suffers from a high index-construction cost that makes it unsuitable for the processing of bigdata. To solve the corresponding problems, we propose a new grid-based, k-NN join query-processing algorithm. Our algorithm retrieves only the neighboring data from a query cell and sends them to each MapReduce task, making it possible to improve the overhead data transmission and computation. Our performance analysis shows that our algorithm outperforms the existing scheme by up to seven-fold in terms of the query-processing time, while also achieving high extent of query-result accuracy.

• The KIPS Transactions:PartB
• /
• v.19B no.2
• /
• pp.113-122
• /
• 2012

This paper presents a new stereo matching technique which is based on the matching of feature windows and feature links. The proposed method uses the FAST feature detector to find image features in stereo images and determines the correspondences of the detected features in the stereo images. We define a feature window which is an image region containing several image features. The proposed technique consists of two matching steps. First, a feature window is defined in a standard image and its correspondence is found in a reference image. Second, the corresponding features between the matched windows are determined by using the feature link technique. If there is no correspondence for an image feature in the standard image, it's disparity is interpolated by neighboring feature sets. We evaluate the accuracy of the proposed technique by comparing our results with the ground truth of in a stereo image database. We also compare the matching accuracy and computation time with two conventional feature-based stereo matching techniques.

• The Transactions of the Korean Institute of Electrical Engineers B
• /
• v.50 no.5
• /
• pp.229-237
• /
• 2001

Until recent years, most of the researches for motor drives focus on the high performance drive of the three phase induction motor, and that of the single phase induction motor(SPIM) is out of interest. The SPIM is widely used at low power level because it has the simple construction and economic advantage. In general such machine has both main winding and auxiliary winding. Conventionally, these winding are fed by only one single phase source, and the speed of the motor is not controlled. The SPIM with an auxiliary winding can be treated as an asymmetrical two phase machine. In this paper the space vector Equivalent circuit of SPIM is derived. For vector control of the SPIM the stator current must be decoupled into the flux producing component and the torque producing component. To accomplish decoupling control, the conventional method requires complex calculation and large computation time. We proposed the equivalent circuit referred to the rotor side, in this case only the stator resistances in the direct axis and the quadrature axis are different each other and the other parameters are represented to be equal. Thus the decoupling of the stator current is similar to that of the three phase induction motor. In this paper, the novel vector control system of the single phase induction motor is proposed. To verify the feasibility of this scheme, simulation and experimentation are carried out. The results prove the excellent characteristics for the dynamic response, which confirms the validity of the proposed system.